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Implementation of NAND and NOR Gates using Digital Circuits, Thesis of Bioengineering

A lecture on the implementation of digital circuits using nand and nor gates instead of and and or gates. It covers the logic operations, graphic symbols, and procedures for implementing boolean functions using two and multilevel nand and nor gates. The document also discusses the differences between nand and nor gates and their applications.

Typology: Thesis

2017/2018

Uploaded on 01/29/2018

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14/4/09
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NAND and NOR
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HowthedigitalcircuitsuseNAND andNORgates
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Dr.SaiedM.AbdElattySoliman ssoliman1@ksu.edu.sa
14April2009 Page2
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NAND and NOR

ImplementationImplementation

This Lecture will cover

How the digital circuits use NAND and NOR gates

rather than AND and OR gates to fabricate the

electronic componentsp such IC digitalg logicg families

Dr. Saied M. Abd El‐atty Soliman ssoliman1@ksu.edu.sa

14 April 2009

Graphic Symbols

Dr. Saied M. Abd El‐atty Soliman ssoliman1@ksu.edu.sa

14 April 2009 Page 2

NAND Implementation

Inverter

Logic Operations with NAND gates

AND
OR

Bubble denotes complementation

Dr. Saied M. Abd El‐atty Soliman ssoliman1@ksu.edu.sa

14 April 2009 Two^ graphic^ symbols^ for^ the^ NAND^ gates Page 3

AND‐ Invert Invert‐ OR

Two Level Implementation

Example1: implement the following function F = AB + CD

The implementation of Boolean functions with NAND gates requires that the functions be in sum of products (SOP) form.

The Rule

This function can be implemented by three different ways as shown in the circuit diagram a, b, c

The function is implemented in ( )

Dr. Saied M. Abd El‐atty Soliman ssoliman1@ksu.edu.sa

14 April 2009 Page 4

The function is implemented in (a) With AND and OR gates (b) The AND gates are replaced by NAND gates and the OR gate is replaced by a NAND gate with invert‐OR graphic. (c) It is similar to case b) but the output NAND gate is redrawn with the AND‐invert.

F = ( AB CD. )

F = AB + CD

Multilevel NAND Circuits

    1. Convert all AND gates to NAND gates with AND‐invert graphic symbols
    1. Convert all OR gates to NAND gates with invert‐OR graphic symbols
    1. Check all the bubbles in the diagrams. For a single bubble, insert an
inverter (one‐input NAND gate) or complement the input literal

Example 1: Consider the Boolean function, implement the circuit diagram by using multilevel

F = A CD ( + B )+ BC ′

NAND gate.

Dr. Saied M. Abd El‐atty Soliman ssoliman1@ksu.edu.sa

14 April 2009 Page 7

Example 2

Example 2: Consider the following Boolean function, implement the circuit diagram by using

multilevel NAND gate. F = ( AB ′ + A B ′ ) (i C + D ′)

AND‐OR gates

Dr. Saied M. Abd El‐atty Soliman ssoliman1@ksu.edu.sa

14 April 2009 Page 8

NAND gates

NOR Implementation

•The NOR operation is the dual of the NAND operation •The NOR gate is another universal gate to implement any Boolean function •Easy for OR‐AND (product of sums)

Dr. Saied M. Abd El‐atty Soliman ssoliman1@ksu.edu.sa

14 April 2009 Page 9

Logic Operations with NOR gates

Two graphic symbols for the NOR gates

OR‐ Invert Invert‐AND

Example 1

Example1: Consider the following Boolean function, implement the circuit diagram by using two l;evel NOR gate

The implementation of Boolean functions with NOR gates requires that the functions be in product of sums (POS) form.

The Rule

l;evel NOR gate.

F = ( A + B ) (i C + D )i E

Transformation from OR‐AND diagram to NOR diagram •OR gates => OR‐invert •AND gate => invert‐AND

Dr. Saied M. Abd El‐atty Soliman ssoliman1@ksu.edu.sa

14 April 2009 Page 10

OR‐AND gate NOR^ gate

AND‐OR‐INVERT Implementation

AND‐NOR = NAND‐AND = AND‐OR‐INVERT

F = (AB + CD + E)’

SiSimilar il to AND OR AND OR INVERTAND‐OR, AND‐OR‐INVERT requiresi an expressioni ii n sum off productsd Given F, we can implement F’ with AND‐OR‐INVERT

Dr. Saied M. Abd El‐atty Soliman ssoliman1@ksu.edu.sa

14 April 2009 Page 13

AND‐NOR AND‐NOR^ NAND‐AND

OR‐AND‐INVERT Implementation

OR‐NAND = NOR‐OR = OR‐AND‐INVERT F = [ (A+B) (C+D) E ] ’

Similar to OR‐AND, OR‐AND‐INVERT requires an expression in products of sum GiGiven FF, we can ii mplementl F’F’ withi h OR AND INVERT OR‐AND‐INVERT

Dr. Saied M. Abd El‐atty Soliman ssoliman1@ksu.edu.sa

14 April 2009 Page 14

OR‐NAND OR‐NAND^ NOR‐OR

Example: Implement the function in Fig.1 with the four two level

form.

F = x’y’z’ + xyz’
F’ = x’y + xy’ + z

F = (F’)’ = (x’y + xy’ + z)’

Fig.

= (x + y’)(x’ + y)z F’ = (F)’ = (x’y’z’ + xyz’)’ = (x + y + z)(x’ + y’ + z)

Dr. Saied M. Abd El‐atty Soliman ssoliman1@ksu.edu.sa

14 April 2009 Page 15

Exclusive‐OR (XOR) Function

XOR: x ْ y = xy’ + x’y Exclusive‐NOR = equivalence

(x ْ y)’ = (xy’ + x’y)’ = (x’ + y)(x + y’) = x’y’ + xy(x y)(x y ) x y xy

Dr. Saied M. Abd El‐atty Soliman ssoliman1@ksu.edu.sa

14 April 2009 Page 16

Communtative: A ْ B = B ْ A Associative: (A ْ B) ْ C = A ْ (B ْ C) = A ْ B ْ C Only a limited number of Boolean functions can be expressed in terms of XOR operations, but it is particularly useful in arithmetic operations and error‐detection and correction circuits

Map for a 4 ‐variable XOR Function

Dr. Saied M. Abd El‐atty Soliman ssoliman1@ksu.edu.sa

14 April 2009 Page 19

Exercises

  1. Simplify the following expressions and implement them with two level NAND gate a)

b)

A B + ABD + AB D + AC D + ABC

BD + BC D + A BC D
  1. Draw a NAND logic diagram that implement the complement of the following function

F A B C D ( , , , ) = (^) ∑(0,1, 2,3, 4,8,9,12)

  1. Draw a logic diagram using only two‐input NAND gates to implement the of following expression :
( A B + A B )( C D + C D )
  1. Draw the multilevel NOR and multilevel NAND circuit for the following expression:

( A B + C D ) E + BC ( A + B )

Dr. Saied M. Abd El‐atty Soliman ssoliman1@ksu.edu.sa

14 April 2009 Page 20

  1. Implement the following Boolean function (F), using the two level forms of logic a)NAND‐AND b)AND‐NOR c)OR‐NAND d)NOR‐OR

F W ( , X Y , , Z ) = (^) ∑(0, 4,8,9,10,11,12,14)

( ) ( )