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A Brief Introduction to Sigma Delta Conversion | EE 287, Study notes of Electrical and Electronics Engineering

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11-888-INTERSIL or 321-724-7143 |Copyright © Intersil Corporation 1999
A Brief Introduction to Sigma Delta Conversion
Introduction
The sigma delta conversion technique has been in existence
for many years, but recent technological advances now make
the devices practical and their use is becoming widespread.
The converters have found homes in such applications as
communications systems, consumer and professional audio,
industrial weight scales, and precision measurement devices.
The key feature of these converters is that they are the only
low cost conversion method which provides both high
dynamic range and flexibility in converting low bandwidth input
signals. This application note is intended to give an engineer
with little or no sigma delta background an overview of how a
sigma delta converter works.
The following are brief definitions of terms that will be used
in this application note:
Noise Shaping Filter or Integrator: The noise shaping fil-
ter or integrator of a sigma delta converter distributes the
converter quantization error or noise such that it is very low
in the band of interest.
Oversampling. Oversampling is simply the act of sampling
the input signal at a frequency much greater than the
Nyquist frequency (two times the input signal bandwidth).
Oversampling decreases the quantization noise in the band
of interest.
Digital Filter. An on-chip digital filter is used to attenuate
signals and noise that are outside the band of interest.
Decimation: Decimation is the act of reducing the data rate
down from the oversampling rate without losing information.
Discussion
Figure 1 shows a simple block diagram of a first order sigma
delta Analog-to-Digital Converter (ADC). The input signal X
comes into the modulator via a summing junction. It then
passes through the integrator which feeds a comparator that
acts as a one-bit quantizer. The comparator output is fed
back to the input summing junction via a one-bit digital-to-
analog converter (DAC), and it also passes through the digi-
tal filter and emerges at the output of the converter. The
feedback loop forces the average of the signal W to be equal
to the input signal X. A quick review of quantization noise
theory and signal sampling theory will be useful before div-
ing deeper into the sigma delta converter.
FIGURE 1. FIRST ORDER SIGMA DELTA ADC BLOCK DIAGRAM
Signal Sampling
The sampling theorem states that the sampling frequency of a
signal must be at least twice the signal frequency in order to
recover the sampled signal without distortion. When a signal is
sampled its input spectrum is copied and mirrored at multiples
of the sampling frequency fS. Figure 2A shows the spectrum of
a sampled signal when the sampling frequency fSis less than
twice the input signal frequency 2f0. The shaded area on the
plot shows what is commonly referred to as aliasing which
results when the sampling theorem is violated. Recovering a
signal contaminated with aliasing results in a distorted output
signal. Figure 2B shows the spectrum of an oversampled sig-
nal. The oversampling process puts the entire input bandwidth
at less than fS/2 and avoids the aliasing trap.[1]
FIGURE 2A. UNDERSAMPLED SIGNAL SPECTRUM
FIGURE 2B. OVERSAMPLED SIGNAL SPECTRUM
Quantization Noise
Quantization noise (or quantization error) is one limiting fac-
tor for the dynamic range of an ADC. This error is actually
the “round-off” error that occurs when an analog signal is
quantized. For example, Figure 3 shows the output codes
and corresponding input voltages for a 2-bit A/D converter
with a 3V full scale value. The figure shows that input values
of 0V, 1V, 2V, and 3V correspond to digital output codes of
00, 01, 10, and 11 respectively. If an input of 1.75V is applied
to this converter, the resulting output code would be 10
which corresponds to a 2V input. The 0.25V error (2V -
1.75V) that occurs during the quantization process is called
the quantization error. Assuming the quantization error is
random, which is normally true, the quantization error can be
treated as random or white noise. Therefore, the quantiza-
tion noise power and RMS quantization voltage for an A/D
converter are given by the following equations:
X
W
+
-
INTEGRATOR QUANTIZER
(COMPARATOR)
MODULATOR
DIGITAL Y
FILTER
1-BIT
DAC
BCD
AMPLITUDE
INPUT
BANDWIDTH
X
FREQUENCY fS/2 fS
f02f0
FREQUENCY fS/2 fS
AMPLITUDE
INPUT
BANDWIDTH
f02f0
e2RMS 1
q
---e2ed
q
2
------
q
2
---
q2
12
------==V2
() (EQ. 1)
Application Note May 1995 AN9504
Author: David Jarman
pf3
pf4
pf5

Partial preview of the text

Download A Brief Introduction to Sigma Delta Conversion | EE 287 and more Study notes Electrical and Electronics Engineering in PDF only on Docsity!

1 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

A Brief Introduction to Sigma Delta Conversion

Introduction

The sigma delta conversion technique has been in existence

for many years, but recent technological advances now make

the devices practical and their use is becoming widespread.

The converters have found homes in such applications as

communications systems, consumer and professional audio,

industrial weight scales, and precision measurement devices.

The key feature of these converters is that they are the only

low cost conversion method which provides both high

dynamic range and flexibility in converting low bandwidth input

signals. This application note is intended to give an engineer

with little or no sigma delta background an overview of how a

sigma delta converter works.

The following are brief definitions of terms that will be used

in this application note:

Noise Shaping Filter or Integrator: The noise shaping fil-

ter or integrator of a sigma delta converter distributes the

converter quantization error or noise such that it is very low

in the band of interest.

Oversampling. Oversampling is simply the act of sampling

the input signal at a frequency much greater than the

Nyquist frequency (two times the input signal bandwidth).

Oversampling decreases the quantization noise in the band

of interest.

Digital Filter. An on-chip digital filter is used to attenuate

signals and noise that are outside the band of interest.

Decimation: Decimation is the act of reducing the data rate

down from the oversampling rate without losing information.

Discussion

Figure 1 shows a simple block diagram of a first order sigma

delta Analog-to-Digital Converter (ADC). The input signal X

comes into the modulator via a summing junction. It then

passes through the integrator which feeds a comparator that

acts as a one-bit quantizer. The comparator output is fed

back to the input summing junction via a one-bit digital-to-

analog converter (DAC), and it also passes through the digi-

tal filter and emerges at the output of the converter. The

feedback loop forces the average of the signal W to be equal

to the input signal X. A quick review of quantization noise

theory and signal sampling theory will be useful before div-

ing deeper into the sigma delta converter.

FIGURE 1. FIRST ORDER SIGMA DELTA ADC BLOCK DIAGRAM

Signal Sampling

The sampling theorem states that the sampling frequency of a

signal must be at least twice the signal frequency in order to

recover the sampled signal without distortion. When a signal is

sampled its input spectrum is copied and mirrored at multiples

of the sampling frequency fS. Figure 2A shows the spectrum of

a sampled signal when the sampling frequency fS is less than

twice the input signal frequency 2f 0. The shaded area on the

plot shows what is commonly referred to as aliasing which

results when the sampling theorem is violated. Recovering a

signal contaminated with aliasing results in a distorted output

signal. Figure 2B shows the spectrum of an oversampled sig-

nal. The oversampling process puts the entire input bandwidth

at less than fS /2 and avoids the aliasing trap.[1]

FIGURE 2A. UNDERSAMPLED SIGNAL SPECTRUM

FIGURE 2B. OVERSAMPLED SIGNAL SPECTRUM

Quantization Noise

Quantization noise (or quantization error) is one limiting fac-

tor for the dynamic range of an ADC. This error is actually

the “round-off” error that occurs when an analog signal is

quantized. For example, Figure 3 shows the output codes

and corresponding input voltages for a 2-bit A/D converter

with a 3V full scale value. The figure shows that input values

of 0V, 1V, 2V, and 3V correspond to digital output codes of

00, 01, 10, and 11 respectively. If an input of 1.75V is applied

to this converter, the resulting output code would be 10

which corresponds to a 2V input. The 0.25V error (2V -

1.75V) that occurs during the quantization process is called

the quantization error. Assuming the quantization error is

random, which is normally true, the quantization error can be

treated as random or white noise. Therefore, the quantiza-

tion noise power and RMS quantization voltage for an A/D

converter are given by the following equations:

X ∑ ∫

W

+

INTEGRATOR

QUANTIZER (COMPARATOR)

MODULATOR

DIGITAL (^) Y FILTER

1-BIT DAC

B C (^) D

AMPLITUDEINPUT BANDWIDTH X

FREQUENCY fS/2 f 0 fS 2f 0

FREQUENCY fS/2 f (^) S

AMPLITUDE

INPUT BANDWIDTH

f 0 2f 0

e 2 RMS

q --- e 2

  • q de 2

q 2


q 2 12

= = ------ V

2 ( ) (^) (EQ. 1)

Application Note May 1995 AN

Author: David Jarman

where q is the quantization interval or LSB size (see Figure 3).

FIGURE 3. CODE EXAMPLE OF A 2-BIT A/D CONVERTER

As an example, the RMS quantization noise for a 12-bit ADC

with a 2.5V full scale value is 176μV.

A quantized signal sampled at frequency fS has all of its

noise power folded into the frequency band of 0 ≤ f ≤ fS/2.

Assuming once again that this noise is random, the spectral

density of the noise is given by:

Converting this to noise power by squaring it and integrating

over the bandwidth of interest (f 0 ), we get the following

result:

where n 0 is the in-band quantization noise, f 0 is the input

signal bandwidth, and fS is the sampling frequency. The

quantity fS /2f 0 is generally referred to as the Oversampling

Ratio or OSR. It is important to note that Equation 5 above

shows that oversampling reduces the in band quantization

noise by the square root of the OSR.[2]

Sigma Delta Modulator Quantization Noise

The results of the above sampling and noise theory can now

be used to show how a sigma delta modulator shapes

quantization noise. Figure 4 shows the sampled data

equivalent block diagram of a first order sigma delta

modulator. The difference equation for the output of the

modulator is given by:

where e is the quantization noise.

FIGURE 4. FIRST ORDER SIGMA DELTA MODULATOR SAM-

PLED DATA EQUIVALENT BLOCK DIAGRAM

Assuming the input signal is active enough to treat the error

as white noise, the spectral density of the noise (ni = e i - ei-1 )

can be expressed as

The noise power in the bandwidth of interest is

or

This means that increasing fS (which by default increases

the OSR) by a factor of 2 will decrease the in band noise by

9dB. Taking this one step further shows that for the second

order modulator shown in Figure 5 the noise is

and that increasing fs by a factor of 2 decreases the in band

noise by 15dB. In fact, the generalized formula for the noise

of an Mth order modulator is

and doubling the sampling frequency will decrease the in-

band quantization noise by 3(2M+1)dB.[3]

FIGURE 5. SECOND ORDER SIGMA DELTA MODULATOR

Figure 6 depicts the relationship between quantization noise,

OSR, and modulator order by showing the signal to noise

ratio (SNR) vs the OSR for a first, second, and third order

e (^) RMS q 12

= ---------- ( V) (EQ. 2)

q = QUANTIZATION INTERVAL (1 LSB)

3V

2V

1V

11

10

01

0V 00

q

E f( ) e (^) RMS

f (^) S

1 2


=

V

Hz

 ------------^

(EQ. 3)

n 02 e (^2) RMS

2f (^0) f (^) S

= (V 2 ) (EQ. 4)

n 0 e (^) RMS

2f (^0) f (^) S

1 2 --- = ( V) (EQ. 5)

y

i

x

i – 1

e

i

e

i – 1

(EQ. 6)

X i ∑

+

-

+

+

+ + DELAY Y^ i

ei ACCUMULATION

QUANTIZATION

N(f) = E(f) 1 – e

(– jω) ⁄fS 2 e (^) RMS

f (^) S

^ ---- - 

1 2


ω 2f (^) S

^ -------- - ^

V

Hz

= sin  ------------^. (EQ. 7)

n (^0) 2 e 2 RMS π 2 3

2f (^0) f (^) S

= V

2 ( ) (EQ. 8)

0 e^ RMS

π 3

2f (^0) f (^) S

3 2 --- = ( V). (EQ. 9)

e (^) RMS π^2 5

  2f^0 f (^) S

5 2


= ( V) (EQ. 10)

n 0 e (^) RMS πM 2M + 1

  2f^0 f (^) S

M 1 2


= ( V) (EQ. 11)

X ∑ ∫

+

+

1-BIT DAC

1-BIT DAC

FIGURE 9. HI7190 2ND ORDER SIGMA DELTA MODULATOR

FIGURE 10. HI7190 SPECTRAL PLOT

Referring back to the block diagram of Figure 1, it is seen

that after the input signal passes through the modulator it is

fed into the digital filter. The function of the digital filter is to

provide a sharp cutoff at the bandwidth of interest which

essentially removes out of band quantization noise3w and

signals. Figure 11 shows that the digital filter eliminates the

quantization noise that the modulator pushed out to the

higher frequencies.

FIGURE 11A. BEFORE FILTERING

FIGURE 11B. AFTER FILTERING

FIGURE 11. IN-BAND QUANTIZATION NOISE BEFORE AND

AFTER DIGITAL FILTERING

Sigma Delta Conversion Example

Before leaving the discussion of sigma delta modulators it

would be useful to show a quick conversion example. Refer-

ring to Table 1 the table headings X, B, C, D, and W corre-

spond to points in the signal path of the block diagram of

Figure 1. For this example the input X is a DC input of 3/8.

The resultant signal at each point in the signal path for each

signal sample is shown in Table 1. Note that a repetitive pat-

tern develops every sixteen samples and that the average of

the signal W over samples 1 to 16 is 3/8 thus showing that

the feedback loop forces the average of the feedback signal

W to be equal to the input X.

X ∑ ∫

+

+

1-BIT DAC

FREQUENCY (kHz)

0 5 10 15 20

0

**-

-**

NOISE (dB)

LOW PASS DIGITAL FILTER TRANSFER FUNCTION

fC

FREQUENCY fS 2

QUANTIZATION NOISE

TABLE 1. CONVERSION EXAMPLE

SAMPLE

(n)

X

(INPUT)

B

(A-W (^) n-1)

C

(B+C (^) n-1)

D

(0 or 1)

W

(-1 or +1) 0 3/8 0 0 0 0 1 3/8 3/8 3/8 1 + 2 3/8 -5/8 -2/8 0 - 3 3/8 11/8 9/8 1 + 4 3/8 -5/8 4/8 1 + 5 3/8 -5/8 -1/8 0 - 6 3/8 11/8 10/8 1 + 7 3/8 -5/8 5/8 1 + 8 3/8 -5/8 0/8 0 - 9 3/8 11/8 11/8 1 + 10 3/8 -5/8 6/8 1 + 11 3/8 -5/8 1/8 1 + 12 3/8 -5/8 -4/8 0 - 13 3/8 11/8 7/8 1 + 14 3/8 -5/8 2/8 1 + 15 3/8 -5/8 -3/8 0 - 16 3/8 11/8 8/8 1 + 17 3/8 -5/8 3/8 1 + 18 3/8 -5/8 -2/8 0 -

LOW PASS DIGITAL FILTER TRANSFER FUNCTION

FREQUENCY fC f (^) S 2

QUANTIZATION NOISE

Introduction to Z-Transforms

Z transforms are often mentioned when digital filters are dis-

cussed and they can be intimidating to those not familiar with

them. However, a few pictures and equations showing the

relationships between the Laplace and z transforms along

with a z transform example should help to reduce the intimi-

dation factor.

The following equations provide a simple (and not rigorous)

method for observing the relationships of the Laplace and z

transforms:

Equations 16A and 16B show the definitions of the two trans-

forms. For the Laplace transform s is defined to be jω while for

the z transform z is defined as e jωt. Substituting these values

into 16A and 17A respectively result in Equations 18A and 18B.

These last two equations show that the two transforms are

actually very similar with the difference being the Laplace trans-

form is a continuous summation of a continuous signal and the

z transform is a discreet summation of a sampled signal.

Figure 12 graphically defines the relationships between the s

and z planes. It is important to note the following:

1. The left half of the s plane maps within the unit circle of

the z plane.

2. The distance f S along the real frequency axis of the s

plane wraps once around the unit circle in the z plane.

3. Any pole outside of the unit circle in the z plane means the

system is unstable.

4. First order poles on the unit circle of the z plane imply

marginally stable terms but multiple order poles on the

unit circle imply an unstable system.

5. Poles inside the unit circle of the z plane represent stable

terms.

6. Zeros can appear anywhere in the z plane without affect-

ing system stability.

FIGURE 12. S PLANE AND Z PLANE MAPPING

It is also important to note that a z -1^ term in the z domain

translates to a unit time delay in the time domain. [4]

Figure 13 shows an arbitrary block diagram for a z transform

example. From the figure it is seen that

Solving for Y/X, the transfer function of the example is

FIGURE 13. ARBITRARY Z-TRANSFORM EXAMPLE

This system has a second order zero at z = 0 and two poles;

one at z = 0.562, and one at z = -3.562.

The above brief introduction to the z transform leads to a

quick discussion of digital filters.

Digital Filters

There are two types of digital filters:

- Finite Impulse Response (FIR) filter, also known as a non-

recursive filter, represented by

- Infinite Impulse Response (IIR) filter, also known as a

recursive filter, whose response is given by

Note that the difference between these two types of filters is

for the FIR the output y(n) is dependent only on past and

present values of the input. However, the output y(n) for the

IIR filter is dependent on past and present values of both the

input and the output.

Figure 14 shows a block diagram example and derived

transfer functions of a FIR filter and an IIR filter. The advan-

tages and disadvantages of these filters are given in table 1.

The filter most commonly used for the back end of a sigma

delta converter is the FIR because of its stability, ease of

implementation, linear phase response, and the fact that

decimation can be incorporated into the filter itself.

F s( ) e

  • st

f t( ) dt

= (^) ∫ (EQ. 16A)

F z( ) f nt( )z

  • n

n = 0

= (^) ∑ (EQ. 16B)

s = jω (EQ. 17A)

z e

jωt

= (EQ. 17B)

F j( ω) e

  • j ωt

f t( ) dt

= (^) ∫ (EQ. 18A)

F j( ω) f nt( )e . (EQ. 18B)

  • jωnt

n = 0

= ∑

3fS / fS fS /

-fS / -fS -3fS /

S-PLANE (^) Z-PLANE

Z = est

fS/2, 3fS/2, ...

r = 1

0, fS , ...

8x 3Yz

  • 1 2Yz - 2
    • = Y. (EQ. 19)

Y

X

8z 2 z 2 +3z – 2

= ----------------------------. (EQ. 20)

x(k) ∑ y(k)

GAIN

GAIN

GAIN

8

3

2

Z -

Z -

y n( ) a (^) k x n( – k). (EQ. 21) k = 0

M = ∑

y n( ) a (^) k x n( – k) b (^) k k = 0

N

  • (^) ∑ y n( – k) k = 0

M = (^) ∑. (^) (EQ. 22)

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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with- out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

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FIGURE 15B. DECIMATION BY 4 IN THE FREQUENCY DOMAIN

Summary

In summary this application note has been a very brief intro-

duction to the world of sigma delta conversion. The sampling

theorem and quantization noise theory were reviewed and it

was shown that a sigma delta converter grossly oversamples

the input signal and shapes the noise spectrum such that the

modulator appears to be a high pass filter for the noise and a

low pass filter for the input signal. The relationships between

the Laplace and z transforms were discussed and the two

transforms were found to be very similar. The two types of

digital filters were introduced and their properties as they

apply to sigma delta conversion were analyzed. Finally, the

concept of decimation (or data rate reduction) was intro-

duced along with the fact that decimation can easily be

incorporated into an FIR filter structure.

References

[1] Alexander D. Poularikas, Samuel Seely, “Signals and

Systems,” Massachusetts, PWS, 1985. p. 373-374.

[2] James C. Candy, Gabor C. Temes. “Oversampling Meth-

ods for A/D D/A Conversion, Oversampling Delta-Sigma

Converters,” New Jersey, IEEE Press, 1992., p. 2-3.

[3] Candy and Temes, p. 3-7.

[4] Poularikas and Seely, p. 480.

DECIMATOR

OUTPUT SPECTRUM

INPUT SPECTRUM

FILTER TRANSFER FUNCTION

f (^) S /2 fS

fS /8 fS /

fS /8 fS /4 fS /2 fS

fS /2 fS

INPUT

OUTPUT

EFFECTIVE SAMPLING RATE