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Logic Design Basics: Gates, Truth Tables, Boolean Algebra, and Logic Equations, Exams of Computer Architecture and Organization

An introduction to the basics of logic design, including logic gates, truth tables, boolean algebra, and logic equations. It covers topics such as and, or, not gates, and their behavior in various logic functions. It also explains the concepts of combinational and sequential logic, and provides laws and theorems for boolean algebra.

Typology: Exams

Pre 2010

Uploaded on 08/18/2009

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Basics of Logic Design
Appendix C
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Download Logic Design Basics: Gates, Truth Tables, Boolean Algebra, and Logic Equations and more Exams Computer Architecture and Organization in PDF only on Docsity!

Basics of Logic Design Appendix C

Logic Gate „

Performs a logical operation (e.g., AND,OR, NOT) on one or more inputs andproduces a single logic output

Normally perform Boolean logic

Primarily implemented electronically usingdiodes or transistors

Can be constructed using electromagneticrelays, optics, molecules, or evenmechanical elements

The Basics of Logic Design — 2

Boolean Algebra „

Logic function with logic equations

OR operator, +, AND operator, * NOT operator,

Identity law: A+0=A, and A*1=A

Zero and One laws: A+1=1, and A*0=

Inverse laws: A+

=1, and A*

Commutative laws: A+B=B+A, and AB=BA

Associate laws: A+(B+C)=(A+B)+C, andA(BC)=(AB)C

Distributive laws: A(B+C)=(AB)+(AC), andA+(BC)=(A+B)*(A+C)

DeMorgan’s laws:

The Basics of Logic Design — 4

Logic Equations

D=1 if at least 1 input is true E=1 if exactly 2 inputs are true F=1 only if all 3 inputs are true^ The Basics of Logic Design — 5

Combinational Logic

The Basics of Logic Design — 7 3-to-8 decoder

Multiplexors

The Basics of Logic Design — 8 For n data inputs, need log 2 n selector

Sum of Products

The Basics of Logic Design — 10

Programmable Logic Array (PLA)

Chapter 3 — Arithmetic for Computers — 11 Sum of products

ROM (Read-Only Memory) „

Read-only

A set of input address lines and a set ofoutputs

Height: m input lines => 2

m

addressable

entries

Width: # of bits in each addressable entry

Chapter 3 — Arithmetic for Computers — 13

Don’t Cares

Chapter 3 — Arithmetic for Computers — 14 Without don’t cares With output don’t cares With input don’t cares Logic minimization can be done using Karnaugh maps

1-Bit Arithmetic Logic Unit

Chapter 3 — Arithmetic for Computers — 16 CarryOut =

1-Bit ALU (cont’d)

Chapter 3 — Arithmetic for Computers — 17

32-Bit ALU

Chapter 3 — Arithmetic for Computers — 19 Ripple carry adder

32-Bit ALU

Chapter 3 — Arithmetic for Computers — 20 Subtraction using adder