Combination circuits, Study notes of Digital Electronics

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Combinational Circuits

Combinational Circuits

• Combinational circuits are circuits made up of different types of logic gates.
• The circuits do not make use of any memory or storage device.
• Examples: Adder, Subtractor, Converter, and Encoder/Decoder
• A combinational circuit can have an n number of inputs and m number of outputs.
• Functions of Combinational Logic Circuit

Truth Table, Boolean Algebra, Logic Diagram

Half-Adder

A half-adder is a arithmetic circuit block that can be used to add two bits. Such a

circuit thus has two inputs that represent the two bits to be added and two outputs,

with one producing the SUM output and the other producing the CARRY.

The sum (S) bit and the carry (C) bit, according to the rules of binary addition, are

given by

The sum column resembles like an output of the XOR gate

The carry column resembles like an output of the AND gate.

A B S C

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

Design Half-Adder using NAND Logic

ҧ 𝐴𝐵 = 𝐴

ҧ 𝐴 +

ҧ 𝐴𝐵 + 𝐵

ҧ 𝐴 +

ҧ 𝐴 +

Half Adder Limitation

• In multi-digit addition we have to add two bits along with the carry of previous

digit addition. Such addition requires additions of 3 bits. This is not possible in

half-adders.

Full Adder

• A full adder is an arithmetic circuit block that can be used to add 3 bits to

produce a SUM and a CARRY output.

• The full adder circuit overcomes the limitation of the half-adder, which can be

used to add two bits only.

A B C SUM Carry

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1

ҧ 𝐴 +

𝑖𝑛

𝑖𝑛

𝑖𝑛

𝑖𝑛

ҧ 𝐴 +

𝑖𝑛

Design Full-Adder using NOR Logic

• For n-bit addition a chain of n full adders is required. A ‘n’ binary adder can be

designed by:

• n full adder
• (n- 1 ) full adder and a half adder
• (n- 1 ) [ 2 half adder + OR Gate] with a half adder
• ( 2 n- 1 ) half adder plus (n- 1 ) OR gate

Design Half-Subtractor using NAND Logic

ҧ 𝐴𝐵 = 𝐵

ҧ 𝐴 +

ҧ 𝐴𝐵 = 𝐴

ҧ 𝐴𝐵 + 𝐴

ҧ 𝐴

ҧ 𝐴(𝐴 + 𝐵)

ҧ 𝐴𝐵 =

ҧ 𝐴 𝐴 + 𝐵 = 𝐴 + 𝐴 + 𝐵

Design Half-Subtractor using NOR Logic

Design Full-Subtractor using NAND Logic

𝑖

𝑖

𝑖

𝑖

𝑖

Design Full-Subtractor using NOR Logic

• When the binary sum is equal to or less than 1001 , the corresponding BCD

number is identical, and therefore no conversion is needed.

• When the binary sum is greater than 1001 , we obtain an invalid BCD

representation. The addition of binary 6 ( 0110 ) to the binary sum converts it to

the correct BCD representation and also produce an output carry as required.

• It is obvious that a correction is needed when the binary sum has an output

carry K = 1. The other six combinations from 1010 through 1111 that need a

correction have a 1 in position 𝑍 3

. To distinguish them from binary 1000 and

1001 , which also have a 1 in position 𝑍 3

, we specify further that either 𝑍 2

or

1

must have a 1. The condition for a correction and an output carry can be

expressed by the Boolean function

3

2

3

1

When C = 1 , it is necessary to add 0110 to the binary sum and provide an output

carry for the next stage.