Data Representation in Computer Systems: Binary, Octal, and Hexadecimal, Thesis of Computer Vision

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·

M. Morris Mano .1l

Preface

This book deals with computer architecture as well as computer organization

and design. Computer architecture is concerned with the structure and behav ior of the various functional modules of the computer and how they interact to provide the processing needs of the user. Computer organization^ is^ con cerned with the way the hardware components are connected together to form a computer system. Computer design is concerned with the development of the hardware for the computer taking into consideration a given set of specifJCa tions. The book provides the basic knowledge necessary to understand the hardware operation of digital computers and covers the three subjects associ ated with computer hardware. Chapters 1 through 4 present the va.rious digital components used in the organization and design of digital computers. Chap ters 5 through 7 show the detailed steps that a designer must go through in

order to design an elementary basic computer. Chapters 8 through 10 deal with

the organization and architecture of the cential processing unit. Chapters 11

and 12 present the organization and architecture of input-output and memory.

Chapter 13 introduces the concept of multiprocessing. The plan of the book is

to present the simpler material first and introduce the more advanced subjects later. Thus, the first seven chapters cover material needed for the basic under standing of computer organization, design, and programming of a simple digital computer. The last six chapters present the organization and architec ture of the separate functional units of the digital computer with an emphasis on more advanced topics. The material in the third edition is organized in the same manner as in the second edition and many of the features remain the same. The third edition, however, offers several improvements over the second edition. All chapters

except two (6 and 10) have been completely revised to bring the material up to

date and to clarify the presentation. Two new chapters were added: chapter 9

on pipeline and vector processing, and chapter 13 on multiprocessors. Two

sections deal with the reduced instruction set computer (RISC). Chapter 5 has

been revised completely to simplify and clarify the design of the basic com

puter. New problems have been formulated for eleven of the thirteen chapters. The physical organization of a particular computer including its registers,

XV

Preface xvii

between binary programs and symbolic code is explained by examples. The basic operations of an assembler are presented to show the translation from symbolic code to an equivalent binary program. Chapter 7 introduces the concept of microprogramming. A specific micro programmed control unit is developed to show by example how to write microcode for a typical set of instructions. The design of the control unit is carried-out in detail including the hardware for the microprogram sequencer. Chapter 8 deals with the central processing unit (CPU). An execution unit with common buses and an arithmetic logic unit is developed to show the general register organization of a typical CPU. The operation of a memory stack is explained and some of its applications are demonstrated. Various instruction formats are illustrated together with a variety of addressing modes. The most common instructions found in computers are enumerated with an explanation of their function. The last section introduces the reduced instruction set com puter (RISC) concept and discusses its characteristics and advantages. Chapter 9 on pipeline and vector processing is a new chapter in the third edition. (The material on arithmetic operations from the second edition has been moved to Chapter 10. ) The concept of pipelining is explained and the way it can speed-up processing is illustrated with several examples. Both arithmetic and instruction pipeline is considered. It is shown how RISC processors can achieve single-cycle instruction execution by using an efficient instruction pipeline together with the delayed load and delayed branch techniques. Vector processing is introduced and examples are shown of floating-point operations using pipeline procedures. Chapter 10 presents arithmetic algorithms for addition, subtraction, mul tiplication, and division and shows the procedures for implementing them with digital hardware. Procedures are developed for signed-magnitude and signed-2's complement fixed-point numbers, for floating-point binary numbers, and for binary coded decimal (BCD) numbers. The algorithms are presented by means of flowcharts that use the register transfer language to specify the sequence of microoperations and control decisions required for their implementation. Chapter 11 discusses the techniques that computers use to communicate with input and output devices. Interface units are presented to show the way that the processor interacts with external peripherals. The procedure for asynchronous transfer of either parallel or serial data is explained. Four modes of transfer are discussed: programmed 110, interrupt initiated transfer, direct memory access, and the use of input-output processors. Specific examples illustrate procedures for serial data transmission. Chapter 12 introduces the concept of memory hierarchy, composed of cache memory, main memory, and auxiliary memory such as magnetic disks. The organization and operation of associative memories is explained in

detail. The concept of memory management is introduced through the presentation of the hardware requirements for a cache memory and a virtual memory system.

xviii Preface

Chapter 13 presents the basic characteristics of mutiprocessors. Various interconnection structures are presented. The need for interprocessor arbitra tion, communication, and synchronization is discussed. The cache coherence problem is explained together with some possible solutions. Every chapter includes a set of problems and a list of references. Some of the problems serve as exercises for the material covered in the chapter. Others are of a more advanced nature and are intended to provide practice in solving problems associated with computer hardware architecture and design. A solu tions manual is available for the instructor from the publisher. The book is suitable for a course in computer hardware systems in an electrical engineering, computer engineering, or computer science depart ment. Parts of the book can be used in a variety of ways: as a first course in computer hardware by covering Chapters 1 through 7; as a course in computer organization and design with previous knowledge of digital logic design by reviewing Chapter 4 and then covering chapters 5 through 13; as a course in computer organization and architecture that covers the five functional units of digital computers including control (Chapter 7), processing unit (Chapters 8 and 9), arithmetic operations (Chapter 10), input-output (Chapter 11), and memory (Chapter 12). The book is also suitable for self-study by engineers and scientists who need to acquire the basic knowledge of computer hardware architecture.

Acknowledgments

My thanks goes to those who reviewed the text: particularly Professor Thomas L. Casavant of the University of Iowa; Professor Murray R. Berkowitz of George Mason University; Professor Cern Ersoy of Brooklyn Polytechnic University; Professor Upkar Varshney of the University of Missouri, Kansas City; Professor Karan Watson of Texas A&M University, and Professor Scott F. Midkiff of the Virginia Polytechnic Institute.

M. Morris Mano

iv Contents

CHAPTER TWO Digital Components

2-1 Integrated Circuits 2-2 Decoders NAND Gate Decoder Decoder Expansion Encoders 47

45 46

2·3 Multiplexers 2-4 Registers Register with Parallel Load 51 2-5 Shift Registers Bidirectional Shift Register with Parallel Load 2-6 Binary Counters Binary Counter with Parallel Load 2-7 Memory Unit Random-Access Memory (^60) Read-Only Memory (^61) Types of ROMs 62 Problems References

58

CHAPTER THREE Data Representation

3-1 Data Types Number Systems 68 Octal and Hexadecimal Numbers 69 Decimal Representation 72 Alphanumeric Representation 73 3-2 Complements (r-l)'s Complement 75 (r's) Complement 75 Subtraction of Unsigned Numbers 76 3-3 Fixed-Point Representation Integer Representation 78 Arithmetic Addition 79 Arithmetic Subtraction 80 Overflow 80 Decimal Fixed-Point Representation 81

53

3-4 Floating-Point Representation

3-5 Other Binary Codes Gray Code 84 Other Decimal Codes 85 Ocher Alphanumeric Codes 86

3-6 Error Detection Codes Problems References

CHAPTER FO UR

Contents V

Register Transfer and Microoperations 93

4·1 Register Transfer language

4·2 Register Transfer 4-3 Bus and Memory Transfers Three-Stare Bus Buffers I 00

Memory Transfer 10 I Arithmetic Microoperations Binary Adder 1 03 Binary Adder-Subtractor I

Binary lncremenrer 1 05 Arithmetic Circuit I Logic Microoperations List of Logic Microoperations Hardware Implementation Some Applications III 4-6 Shift Microoperations

1 09 III

Hardware Implementation II

4-7 Arithmetic Logic Shift Unit Problems References

CHAPTER FIVE

Basic Computer Organization and Design 123

5-1 Instruction Codes Stored Prowam Organization Indirect Address I

I

Contents vii

viii Contents

7-4 Design of Control Unit Microprogram Sequencer 232 Problems References

CHAPTER EIGHT Central Processing Unit

8-1 Introduction 8-2 General Register Organization Control Word 244 Examples of Microoperations 246 8-3 Stack Organization

Register Stack 247 Memory Stack 249 Reverse Polish Notation 251 Evaluation of Arithmetic Expressions 253 Instruction Formats Three-Address Instructions Tw:J-Address Instructions One-Address Instructions Zero-Address Instructions RISC Instructions 259

258 258 259 259

8-5 Addressing Modes Numerical Example 264 8-6 Data Transfer and Manipulation Data Transfer Instructions 267 Data Manipulation Instructions 268 Arithmetic Instructions 269 Logical and Bit Manipulation Instructions Shift Instructions 271 8-7 Program Control Status Bit Conditions 274 Conditional Branch Instructions 275 Subroutine Call and Return 278 Program Interrupt 279 Types of Interrupts 281 8-8 Reduced Instruction Set Computer (RISC) CISC Characteristics 283 RISC Characteristics 284

270

X Contents

Hardware Implementation 336 Hardware Algorithm 337 Addition and Subtraction with Signed-2's Complement Data 338 10-3 Multiplication Algorithms Hardware Implementation for Signed-Magnitude Data 341 Hardware Algorithm 342 Booth Multiplication Algorithm 343 Array Multiplier 346 10-4 Division Algorithms Hardware Implementation for Signed-Magnitude Data 349 Divide Overflow 351 Hardware Algorithm 352 Other Algorithms 353 10-5 Floating-Point Arithmetic Operations Basic Considerations 354 Register Configuration 357 Addition and Subtraction 358 Multiplication 360 Division 362 10-6 Decimal Arithmetic Unit BCD Adder 365 BCD Subtraction 368 10-7 Decimal Arithmetic Operations Addition and Subtraction 371 Multiplication 371 Division 374 Floating-Point Operations 376 Problems References

CHAPTER ELEVEN Input-Output Organization

11-1 Peripheral Devices ASCII Alphanumeric Characters 383 11-2 Input-Output Interface 110 Bus and Interface Modules 386 110 versus Memory Bus 387

Contents xi

Contents xiii

• 6-3 Assembly Language
  • Rules of the Language
  • An Example
  • Translation to Binary
• 6-4 The Assembler - in Memory Representation of Symbolic Program
  • First Pass
  • Secorui Pass
• 6-5 Program Loops - Operations 6-6 Programming Arithmetic and Logic
  • Multiplication Program
  • Double-Precision Addition
  • Logic Operations
  • Shift Operations
• 6-7 Subroutines
  • Subroutines Parameters and Dara Linkage
• 6-8 Input-Output Programming
  • Character Manipulation
    • Program Interrupt
    • Problems
    • References - Microprogrammed Control CHAPTER SEVEN
• 7-1 Control Memory
• 7-2 Address Sequencing - Coruiitional Branching - Mapping of Instruction - Subroutines
  • 7-3 Microprogram Example
    • Computer Configuration
    • Microinstruction Format
    • Symbolic Microinstructions
    • The Fetch Routine
    • Symbolic Microprogram
    • Binary Microprogram
      • Overlapped Register Windows
    • B.,-keley ruse
      • Problems
      • References - Pipeline and Vector Processing CHAPTER N IN E
  • 9-1 Parallel Processing
  • 9-2 Pipelining - General Considerations
  • 9-3 Arithmetic Pipeline
  • 9-4 Instruction Pipeline - Example: Four-Segment Instruction Pipeline - Data Dependency - Handling of Branch Instructions
  • 9-5 R ISC Pipeline - Example: Three-Segment Instruction Pipeline - Delayed Load - Delayed Branch
  • 9-6 Vector Processing - Vector Op.,-ations - Matrix Multiplication - Memory Interleaving - Sup...comput£rs
  • 9-7 Array Processors - Attached Array Processor - SIMD Array Processor - Problems - References - Computer Arithmetic CHAPTER TEN
• 10-1 Introduction
• 10.2 Addition and Subtraction - Data Addition and Subtraction with Signed-Magnitude - Isolated versus Memory-Mapped - Example of 110 Interface
• 11-3 Asynchronous Data Transfer - Strobe Control - Handshaking - Asynchronous Serial Transfer - Asynchronous Communication Interface - First-In, First-Out Buffer
• 11-4 Modes of Transfer - Example of Programmed - Interrupt-Initiated
  • Software Considerations
• 11-5 Priority Interrupt - Daisy-Chaining Priority - Parallel Priority Interrupt - Priority Encoder - Interrupt Cycle - Software Routines - Initial and Final Operations
• 11-6 Direct Memory Access (DMA) - DMA Controller - DMA Transfer
• 11-7 Input-Output Processor (lOP) - CPU-lOP Communication - IBM 370 110 Channel - Intel 8089 lOP
• 11-8 Serial Communication
  • Character-Oriented Protocol
    • Transmission Example
    • Data Transparency
    • Bit-Oriented Protocol
    • Problems
    • References
      • Memory Organization CHAPTER TWELVE
• 12-1 Memory Hierarchy
• 12-2 Main Memory
  • RAM and ROM Chips
  • Serial Arbitration Procedure
    • Parallel Arbitration Logic
  • Dynamic Arbitration Algorithms
    • Synchronization 13·4 lnterprocessor Communication and
  • lnterprocessor Synchronization
  • Mutual Exclusion with a Semaphore
• 13-5 Cache Coherence
  • Conditions for Incoherence
  • Solutions to the Cache Coherence Problem
  • Problems
  • References - Index

digital

..

lrit

CHAPTER ONE

Digital Logic

Circuits

lN THIS CHAPTER

1-1 Digital^ Computers 1-2 logic Gates 1-3 (^) Boolean Algebra 1-4 Map Simplification 1-5 Combinational Circuits 1-6 Rip-Flops 1-7 (^) Sequential Circuit>

1-1 Digital Computers

The d gitai l computer is a dig ital system that performs various computational

tasks. The word digital implies t.hat the information in the computer is repre sented by variables that take a limited number of discrete values. These values are processed intemally by components that can maintain a limited number of disaete states. The decimal digits 0, 1, 2, ..., 9, for example, provide 10 discrete values. The first electronic digital computers, developed in the late

1940s, were used primarily for numerical computations. ln this case the dis

crete elements are the digits.From this application the termdigitAlc:omputuha.s emerged. In practice, digital computers function more reliably if only two states are used.Because of the physical restriction of components, and because human logic tends to be binary (i.e., true-<>r-false, yes-<>r-no statements), digital components that are constrained to^ take^ discrete values are further constrained to take only two values and are said to be bituzry. Digital computers use the binary number system, which has two digits: 0 and 1. A binary digit is called a mi. Information is represented in digital computers in groups ofbits. By using various coding techniques, groups ofbits can be made to represent not only binary numbers but also other discrete

CO"'P"t" 0'8111d%11tiOrt

computer dalgn

computer m:hiteclurt

SOCTION 1·1 0\gllal Compuru> 3

Figure 1·1 Block diaeram of a digital computer.

and logic unit for manipulating dala, a number of registers for storing dala, and control circuits for fetching and executing inslnlctions. The memory of a

computer contains storage for inslnlctions and data. It is called a random·

access memory (RAM) because the CPU can access any location in memory at random and retrieve the binaryinformation within a fixed interval of time. The input and output processor (lOP) contains electronic circuits for communicat ing and controlling the transfer of information between the computer and the outside world. The input and output devices connected to the computer include keyboards, printers, terminals, magnetic disk drives, and other com· munication devices. This book provides the basic knowledge necessary to understand the

hardware operations of a computer syst�m. The subject is sometimes consid

ered from three different points of view, depending on the interest of the

investigator. When dealing with computer hardware it is customary to distin·

guish between what is referred to as^ computer organi.ution, computer design, and computer architecture. Compul�r organiZRiion is concerned with the way the hardware co nents operate and the way they are connected together to form the computer system. The various components are assumed to be in place and the task is to investigate the organhational slnlcture to verify that the computer parts ope ate as intended. Compute cksign is concerned with the hardware design of the computer. Once the computer specifications are formulated, it is the task of the designer to develop hardware for the system. Computer design is concerned with the determination of what hardware should be used and how the parts should be connected. This aspect of computer hardware is sometimes referred to as computer implrolhltation. Computer architecture is concerned with the slnlcture and behavior of the computer as seen by the user. It includes the information formats, the inslnlc-

4 CHAPTER ONE Digital Logic Circuits

gates

AND

tion set, and techniques for addressing memory. The architectural design of a computer system is concerned with the specifications of the various func tional modules, such as processors and memories, and structuring them to gether into a computer system. The book deals with all three subjects associated with computer hard ware. In Chapters 1 through 4 we present the various digital components used in the organization and design of computer systems. Chapters 5 through 7 cover ·the steps that a designer must go through to design and program an elementary digital computer. Chapters 8 and 9 deal with the architecture of the central processing unit. In Chapters 11 and 12 we present the organization and architecture of the input-output processor and the memory unit.

1 -2 Logic Gates

Binary information is represented in digital computers by physical quantities called signals. Electrical signals such as voltages exist throughout the computer in either one of two recognizable states. The two states represent a binary variable that can be equal to 1 or 0. For example, a particular digital computer may employ a signal of 3 volts to represent binary 1 and 0.5 volt to represent binary 0. The input terminals of digital circuits accept binary signals of 3 and 0.5 volts and the circuits respond at the output terminals with signals of 3 and 0.5 volts to represent binary input and output corresponding to 1 and 0, respectively. Binary logic deals with binary variables and with operations that assume a logical meaning. It is used to describe, in algebraic or tabular form, the manipulation and processing of binary information. The manipulation of bi nary information is done by logic circuits called gates. Gates are blocks of hardware that produce signals of binary 1 or 0 when input logic requirements are satisfied. A variety of logic gates are commonly used in digital computer systems. Each gate has a distinct graphic symbol and its operation can be described by means of an algebraic expression. The input-output relationship of the binary variables for each gate can be represented in tabular form by a truth table. The names, graphic symbols, algebraic functions, and truth tables of eight logic gates are listed in Fig. 1-2. Each gate has one or two binary input variables designated by A and Band one binary output variable designated by x. The AND gate produces the AND logic function: that is, the output is 1 if input A and input B are both equal to 1; otherwise, the output is 0. These conditions are also specified in the truth table for the AND gate. The table shows that output x is 1 only when both input A and input Bare 1. The algebraic operation symbol of the AND function is the same as the multiplication symbol of ordinary arithmetic. We can either use a dot between the variables or