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COMPUTER ORGANISATION ARCHITECTURE, Exams of Computer Architecture and Organization

Chhattisgarh Swami Vivekanand Technical UniversityComputer Architecture and Organization

Previous year important Questions

Typology: Exams

2023/2024

Available from 05/14/2024

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Unit 1
Q1.Who control the buses in DMA data Transfer & How ?!
Ans:-In Direct Memory Access (DMA) data transfer, the control of buses is typically
managed by a DMA controller or DMA engine. The DMA controller is a hardware
component that is responsible for coordinating and controlling data transfers
between devices without involving the CPU directly.!
The DMA controller interacts with the system bus and peripheral devices to initiate
and manage data transfers. It has direct access to the system bus and can take
control of it when necessary. The controller is programmed by the CPU to perform
specific data transfer operations, such as moving data from one memory location
to another or transferring data between a peripheral device and memory.!
Here's a general overview of how the DMA transfer process works:!
1. Initialization: The CPU sets up the DMA controller by configuring its registers
with the necessary information, such as the source and destination
addresses, transfer size, and transfer mode.!
2. Request: When a peripheral device needs to transfer data to or from memory,
it sends a request to the DMA controller.!
3. Bus acquisition: The DMA controller checks if the system bus is available. If
it's not currently being used by the CPU or other DMA transfers, the
controller gains control of the bus.!
4. Transfer: Once the DMA controller has control of the bus, it transfers the data
directly between the peripheral device and memory without CPU intervention.
The controller manages the data movement and handles any necessary
address increments or data conversions.!
5. Completion: After the data transfer is complete, the DMA controller releases
control of the bus and signals the CPU or the peripheral device to indicate
the transfer status.!
Q2. What do you understand by subroutine ? Discuss about parameter passing in
sub routine ?!
Ans:- A subroutine, also known as a procedure or function, is a named section of
code within a program that performs a specific task or set of tasks. Subroutines
allow for code modularity and reusability by encapsulating a sequence of
instructions that can be called from different parts of a program.!
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Unit 1

Q1.Who control the buses in DMA data Transfer & How? Ans:-In Direct Memory Access (DMA) data transfer, the control of buses is typically managed by a DMA controller or DMA engine. The DMA controller is a hardware component that is responsible for coordinating and controlling data transfers between devices without involving the CPU directly. The DMA controller interacts with the system bus and peripheral devices to initiate and manage data transfers. It has direct access to the system bus and can take control of it when necessary. The controller is programmed by the CPU to perform specific data transfer operations, such as moving data from one memory location to another or transferring data between a peripheral device and memory. Here's a general overview of how the DMA transfer process works:

  1. Initialization: The CPU sets up the DMA controller by configuring its registers with the necessary information, such as the source and destination addresses, transfer size, and transfer mode.
  2. Request: When a peripheral device needs to transfer data to or from memory, it sends a request to the DMA controller.
  3. Bus acquisition: The DMA controller checks if the system bus is available. If it's not currently being used by the CPU or other DMA transfers, the controller gains control of the bus.
  4. Transfer: Once the DMA controller has control of the bus, it transfers the data directly between the peripheral device and memory without CPU intervention. The controller manages the data movement and handles any necessary address increments or data conversions.
  5. Completion: After the data transfer is complete, the DMA controller releases control of the bus and signals the CPU or the peripheral device to indicate the transfer status. Q2. What do you understand by subroutine? Discuss about parameter passing in sub routine? Ans:- A subroutine, also known as a procedure or function, is a named section of code within a program that performs a specific task or set of tasks. Subroutines allow for code modularity and reusability by encapsulating a sequence of instructions that can be called from different parts of a program.

Parameter passing in subroutines refers to the mechanism of passing values or references between the calling code and the subroutine. Parameters are inputs to the subroutine that allow it to perform its task based on specific data provided by the calling code. They enable the subroutine to be more flexible and adaptable to different situations. There are generally three common methods of parameter passing in subroutines:

  1. Pass-by-Value: In this method, the value of the parameter is copied and passed to the subroutine. Any modifications made to the parameter within the subroutine do not affect the original value in the calling code.
  2. Pass-by-Reference: With pass-by-reference, instead of passing the value, a reference (address) to the variable in the calling code is passed to the subroutine. This allows the subroutine to directly access and modify the original variable.
  3. Pass-by-Value-Result: This method combines aspects of pass-by-value and pass-by-reference. The value of the parameter is initially copied and passed to the subroutine. Any modifications made to the parameter within the subroutine are reflected in the original variable in the calling code after the subroutine execution completes. The choice of parameter passing method depends on various factors, such as the programming language, the nature of the data being passed, and the desired behavior of the subroutine. Each method has its advantages and considerations regarding memory usage, data integrity, and performance. Additionally, some programming languages offer additional parameter passing mechanisms, such as pass-by-name or pass-by-need, which introduce different behaviors and evaluation strategies. Q3. Write Difference Between Hardwired & Microprogramed control Unit. Draw block diagram of Both? Ans:-

To evaluate the effective address for different addressing modes based on the given scenario, let's consider the following: Instruction stored at location 300: Instr Address field at location 301: 400 Processor register R1: 200 (i) Direct Addressing Mode: In direct addressing mode, the address field directly provides the memory address where the operand is located. Therefore, the effective address is the value in the address field. Effective address = 400 (ii) Immediate Addressing Mode: In immediate addressing mode, the operand is directly specified within the instruction itself, rather than referring to a memory location. Therefore, the effective address is the immediate value itself. Effective address = Value in the address field = 400 (iii) Relative Addressing Mode: In relative addressing mode, the address field contains a value that is added to the program counter (PC) to determine the effective address. This mode is typically used for branching instructions. Effective address = Value in the address field + Current PC = 400 + (PC at instruction fetch time) Note: The specific value of the PC at instruction fetch time is required to compute the effective address. (iv) Register Indirect Addressing Mode: In register indirect addressing mode, the address field contains the number of a processor register that holds the memory address of the operand. In this case, the effective address is obtained by accessing the memory address stored in the specified register. Effective address = Value in the register R1 = 200 For the relative addressing mode, the specific value of the PC at instruction fetch time is needed to determine the effective address. Without that information, it is not possible to compute the exact effective address.

Q5. What is computer System Architecture? Ans:- Computer system architecture refers to the structure and organization of a computer system, including its hardware components, memory organization, instruction set architecture, and the interaction between these components. It encompasses the design principles and guidelines that dictate how a computer system is built and operates Computer system architecture involves the following key aspects:

  1. Central Processing Unit (CPU): The CPU is responsible for executing instructions and performing calculations. It consists of an arithmetic logic unit (ALU) for mathematical and logical operations, control unit for instruction interpretation and execution control, and registers for temporary storage.
  2. Memory Hierarchy: The computer system includes various levels of memory, such as registers, cache, main memory (RAM), and secondary storage (hard drives, solid-state drives). These memory levels differ in terms of speed, capacity, and cost, with registers being the fastest and most expensive, and secondary storage being slower but having larger capacity.
  3. Instruction Set Architecture (ISA): The ISA defines the set of instructions that a processor can execute, including the data types, addressing modes, and operations supported. It serves as the interface between the hardware and the software, allowing programs to be written and executed on a specific architecture.
  4. Input/Output (I/O) Subsystem: The I/O subsystem handles the communication between the computer system and external devices, such as keyboards, mice, displays, printers, and network interfaces. It includes controllers, interfaces, and protocols for data transfer and device management.
  5. System Bus: The system bus is a communication pathway that connects various components of the computer system, including the CPU, memory, and I/O devices. It allows for the transfer of data and control signals between these components.
  6. Interrupts and Interrupt Handling: Interrupts are signals generated by hardware or software to request the CPU's attention for a particular event or condition. Interrupt handling mechanisms are responsible for suspending the current execution, saving the context, and handling the interrupt event.
  7. Parallelism and Pipelining: Computer architectures often incorporate techniques like parallelism and pipelining to improve performance. Parallelism involves executing multiple instructions simultaneously, while pipelining divides the execution of instructions into stages to overlap different stages of instruction processing.
  • The control bus facilitates the synchronization, timing, and control of operations within the computer system.
  • Importance: The control bus is vital for coordinating and controlling the activities of different components, ensuring proper sequencing, timing, and synchronization of operations.
  1. I/O Bus:
  • The I/O bus, also known as the peripheral bus or expansion bus, connects the CPU to peripheral devices.
  • It allows for the transfer of data and control signals between the CPU and peripherals.
  • Common examples include PCI, USB, and SATA buses.
  • Importance: The I/O bus is crucial for connecting peripheral devices to the CPU and enabling communication and data transfer between them. Q7. What do you under stand by addressing mode? Ans:- In computer architecture, an addressing mode refers to the way in which the operand (data or memory location) of an instruction is specified. It defines how the processor interprets the instruction's address field to determine the location of the data or the memory address being operated on. Different addressing modes provide flexibility in accessing data and memory, allowing programmers to write more concise and efficient code. Here are some commonly used addressing modes:
  1. Immediate: The operand value is directly specified within the instruction itself. For example, "ADD R1, #5" adds the immediate value 5 to the content of register R1.
  2. Direct: The address field of the instruction directly specifies the memory location where the operand is stored. For example, "LOAD R1, 500" loads the contents of memory location 500 into register R1.
  3. Indirect: The address field of the instruction points to a memory location that contains the actual memory address of the operand. It requires an extra memory access to fetch the operand's address before accessing the operand itself.
  4. Register: The operand is stored in a specified processor register. For example, "ADD R1, R2" adds the contents of registers R1 and R2 together.
  5. Register Indirect: The operand's address is stored in a specified processor register. The value in the register is used as the memory address to access the operand.
  1. Indexed: The address field of the instruction is combined with an index register to calculate the effective address of the operand. It allows for efficient array or data structure traversal.
  2. Relative: The operand's address is calculated relative to the current program counter (PC) or instruction pointer. It is often used for branch instructions to specify the offset from the current instruction to the target instruction. Q8. Write in about various Addressing mode with Examples? Ans:- some common addressing modes used in computer architectures, along with examples to illustrate their usage:
  3. Immediate Addressing Mode:
  • The operand value is directly specified within the instruction itself.
  • Example:^ ADD R1, #5^ (Adds the immediate value 5 to the content of register R1)
  1. Direct Addressing Mode:
  • The address^ field of the instruction directly specifies the memory location where the operand is stored.
  • Example:^ LOAD R1, 500^ (Loads the contents of memory location 500 into register R1)
  1. Indirect Addressing Mode:
  • The address^ field of the instruction points to a memory location that contains the actual memory address of the operand.
  • Example:^ LOAD R1, (R2)^ (Loads the contents of the memory location specified by the value in register R2 into register R1)
  1. Register Addressing Mode:
  • The operand is stored in a specified processor register.
  • Example:^ ADD R1, R2^ (Adds the contents of registers R1 and R together)
  1. Register Indirect Addressing Mode:
  • The operand's address is stored in a specified processor register. The value in the register is used as the memory address to access the operand.
  • Example:^ LOAD R1, (R2)^ (Loads the contents of the memory location specified by the value in register R2 into register R1)
  1. Indexed Addressing Mode:
  • The address^ field of the instruction is combined with an index register to calculate the effective address of the operand.
  • Microoperations are low-level operations that manipulate data or control elements within the computer system.
  • Examples of microoperation^ fields include "add," "subtract," "bitwise AND," "bitwise OR," etc. Here's an example of a simplified microinstruction format: In this example, the microinstruction specifies the following operations:
  • Read the contents of Register 1.
  • Perform the addition operation if the zero condition is satisfied. The actual format of microinstructions may vary depending on the specific architecture and design of the microprogrammed control unit. The number and arrangement of fields can differ, and additional fields may be included to accommodate more complex control actions and microoperations.