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This document introduces the basics of logic circuit design, including logic gates, truth tables, logic circuits, Karnaugh maps, MUXes, encoders/decoders, and sequential counters. It explains how to convert truth tables into efficient logic circuits, how to use Karnaugh maps to simplify equations, and how to set up and test MUXes. It also covers the difference between combinational and sequential logic, and how to break feedback loops in sequential circuits. examples and simulations using Logisim software.
Typology: Summaries
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โ Logic gates are the basic building blocks that all of logic is built up from. โ It is important to be familiar with which logic gates are which, their appearance and how they work.
โ Truth tables are a way of writing down what a circuit does. โ Logic circuits are a way of visualizing how to connect up the gates to do the truth table.
โ Karnaugh maps are a way to convert truth tables into efficient logic circuits. โ Computers are better than humans at this task, so not much time will be spent on it.
โ This is the level of complexity that should be focused on for logic design. โ When talking about how the processor is built, these kinds of logic blocks will be used.
โ Logic blocks can be put together to build a memory array.
โ A counter needs to keep track of the current count, which is its state, and also needs a clock to determine how fast it counts. โ This is the same clock that determines how fast a processor runs.
3)Logic Gates to Truth Tables:
โ Walk through the circuit, beginning with the inputs and tracing values through to compute the outputs. โ It gives an example of when the inputs are both 0, and the outputs are 0 and 0. โ It then does the same when the inputs are 0 and 1, resulting in a 1 for Y and a 0 for X. โ It shows how to add an or gate to the circuit, as well as how to set the inputs and outputs.
4)Truth Tables to Logic Gates:
โ A truth table is used to convert into a logic circuit, which will have the same results as the truth table.
โ Y is true when any of the following are true: Not A and B, A and not B, A and B.
โ The circuit for Y includes an inverter for A, an AND gate for Not A and B, an AND gate for A and Not B, and an AND gate for A and B.
โ X is true when A and B are both true.
โ The circuit for X includes an AND gate for A and B.
โ An OR gate is used to combine the three inputs for Y, and the output is Y. The output for X is connected to the AND gate for A and B.
โ The circuit is initially not enabled due to the red wires, signifying that the values of the gates are unknown. โ An inverter is used to create the first term: not A and B. โ Another inverter is used for the second term: not B. โ The third term is A and B, and it is hooked up with B.
5)Karnaugh Maps:
โ The Karnaugh map is filled out by writing out a truth table, with a down the side and B across the top. โ The output of the circuit is a zero when a is false and B is false. โ The output of the circuit is a one when a is false and B is true, a is true and B is false, and a is true and B is true.
โ The terms are selected the same way as before, with one term in the B is true column and not A in the is false column, and B and A in the B is true column and A is true row, and not B and A in the not B column and A row. โ The output is true if B is or A true, and can be written as A equals Y or B. โ Karnaugh maps are important because they let us draw larger boxes, such as one that is true whenever A is true, and one that is true whenever B is true.
โ Karnaugh maps are used to simplify equations by circling the terms that form simpler equations. โ They allow the user to enter inputs and outputs and generate a truth table that can be used to build a circuit.
โ To use a Karnaugh map, enter the inputs (A and B in this example) and the outputs (Y) into the truth table. โ Put in the values and launch the truth table. The expression found by the truth table will be displayed, as well as a karnaugh map. โ The karnaugh map will show the two terms circled, which will give the same expression as before.
โ Karnaugh maps allow you to circle things that form simpler equations. โ Computers are far better at using karnaugh maps than humans, as they can quickly generate a circuit from the truth table.
โ What happens if you don't select the largest group of ones in a karnaugh map? โ If you circle small groups of ones, you will get a circuit with more gates than if you had circled larger groups.
โ The user input is wired to the comparator, and the equal sign from the comparator is wired to the output.
โ Load wiring and set up a comparator, which stops complaining once the B input is set to three. โ A constant of three bits is set to the value 4 in hexadecimal in order to finish the circuit.
โ The circuit is tested by enabling simulations and resetting the simulation. โ When A is set to 0 and B is set to 4, the output is true since the adder 1 added up the values. โ The output is 1 0 0 which is equal to the value of 1 0 0, showing that the circuit works.
โ Rather than building things with end and or gates, larger blocks are used and the wires connecting them are usually buses. โ This allows for larger numbers to be carried on the buses.
7)MUXes:
โ Introduction to multiplexers (MUXes), demultiplexers (DEMUXes), and encoders/decoders as important blocks for building logic circuits. โ MUXes are used to route signals between two inputs, while DEMUXes take one signal and decide where it should be sent to. โ Both MUXes and DEMUXes usually have buses as multi-bit input signals.
โ A four input MUX with 8-bit inputs requires two select bits to choose between the four inputs.
โ Using Logisim, a MUX can be set up with two select bits, four inputs, and 8 data bits. โ Inputs can be set to a constant value of 1, 2, 4, or 9. โ The MUX output is 8-bits wide. โ The enable input is generally not used.
โ The MUX takes the select bits and chooses which one of the four inputs to activate. โ Testing the MUX shows that it is correctly selecting the corresponding inputs and outputs.
โ MUXes are devices that select one input from many inputs.
8)SRAM Example:
โ A memory array is a 2D array of cells which store 1 bit each - either a 1 or 0. โ In order to access the data, one row at a time is enabled, and the data from all the cells in that row is sent down the wires of the array.
โ A 4-bit binary input bus is used to address the memory array, as it has 16 bytes. โ A one hot row enable is used to enable one row at a time to read the data. โ When a row is activated, 16 bits of data is output from the memory.
โ Logic blocks are used to decode the binary address into a one hot row enable, and select between the two 8-bit outputs. โ A decoder is used to take the binary address and activate one of the outputs. โ A MUX is used to take the two 8-bit inputs and choose one of them to generate a single 8-bit data output.
โ The address bits 0-2 are used to select one of the rows, and address bit 3 is used to select which half of the output. โ The remaining 3 bits of the 4-bit address are used to control the decoder. โ The bit from the 4-bit address is hooked up to the MUX to select which half of the data to read out.
โ Having some of the address bits going into the MUX, it is possible to select the correct columns.
โ If the address is 1 0 or 12, the input to the decoder is binary bits 0 through 2 (blue) which is 1 0 0. โ This will output a one-hot value with bit 4 activated, selecting the correct row to read out. โ When the row is activated, all the cells in that row get read out.
โ The decoder uses the first half of the bits and the MUX uses the last bit.
โ This example is an SRAM from ARM. โ It looks like the circuit seen earlier, with a few other features to make SRAMs work. โ The decoder decodes the values and then it goes up to the top where there are pre-charged and right drivers. โ At the bottom, there are sense amplifiers to read out the small signals from the memory array and make them larger. โ Finally, the actual array looks like one blob with many small signals and wires.
โ Combinational logic takes inputs and generates a next state. โ The next state is stored in a state element and outputs the current state. โ This is broken up by a clock signal which updates the current state to the next value.
โ A counter stores the current value, and calculates the next value by adding one. โ Combinational logic is used which takes in inputs and current state. โ A latch is used to store the current value and it is updated when a clock signal comes.
โ A latch looks like a state element and stores data. โ The sum is the next value which goes into the latch, and the output is the current value. โ The latch stores the current value, and updates the current value to the next value when the clock signal comes.
โ Initially the output state is 0, and the current value is 0. โ An adder has 0 and 1 as inputs, and the output is 1. โ This is the next value, but the current value does not change until the clock signal comes. โ When the clock signal comes, the input is moved to the output, which changes the current value to 1. โ When the clock comes again, the next value is the current value plus one, which is 2.
โ The latch in the circuit both stores the current value and breaks the feedback loop. โ The feedback loop is broken when the current value is calculated and the output remains the same until the clock goes from low to high, when the current value is moved to the latch output.
โ Factors that limit the speed of the circuit include how long it takes for the adder to compute the result, how long it takes for data to travel back and forth, and how long it takes for the latch to store the data. โ In this example, if the adder takes two nanoseconds to compute the result, each wire takes one nanosecond, and the latch takes one nanosecond, then the circuit can run at a maximum of 200 megahertz.
โ The circuit contains both combinational logic that takes the current value and the one to generate the next value, and a latch which stores the current value and updates it when the clock signal comes by. โ The speed of the circuit is dependent on the time it takes for data to move around, and the fastest the logic can run is determined by the processor speed.
โ A latch is used as the program counter, which stores the address of the current instruction. โ Logic is used to determine the next instruction, which is the PC plus 4. โ When the clock cycles, the next value is stored in the program counter.
10)SRAM and Flops Example:
โ A circuit that remembers a value is called SRAM or static random-access memory, meaning it keeps the value all by itself as long as power is supplied. โ An SRAM cell consists of a feedback loop with two inverters. โ When a zero is put into the first inverter, it outputs a one which is then inverted to a zero by the second inverter. The output stays at zero as long as electricity is supplied.
โ To write a new value into the SRAM cell, a pass gate is used which allows a new value to be put in when the switch is turned on. โ If the new value is strong enough, it will overwrite the original value. โ The only difference between the input and output is that one is inverted from the other.
โ To create a latch state element controlled by the clock, the clock is attached to the switch on the input. โ When the clock is low, the last value is held. โ When the clock is high, the new value is written over. โ Care must be taken when designing the circuit, so that when a value is written in, it is strong enough to overwrite the original value.
โ To prevent feedback when the clock is low, two transparent latches are used together to form a master/slave latch. โ This master/slave latch only changes its output when the clock changes from low to high.
โ When the clock is high, the input is ignored and the value in the first latch is transferred to the second latch and becomes the output.
โ The first switch is connected to the clock signal, and the second switch is connected to the inverted clock signal. โ This means that data can only be written into the first latch when the clock is low, and moved to the second latch when the clock is high. โ When the clock is high, the input is ignored, so the output does not change.
