ECE 238 Laboratory Manual – University of New Mexico
Introduction to Counters and CPLDs
Introduction
This lab will introduce concepts on digital counters, modular design and we will explore more
capabilities of the XCR board. The systems we will implement are divided in subsystems or
modules described on independent VHDL files. We will use the concepts learn in previous labs to
create, synthesize and download to a CPLD a project.
Goals
After completing this lab, you will be able to:
• Creating a project that utilizes multiple VHDL files.
• Routing signals in and out of the device to facilitate I/O.
• Designing and implementing counters.
• Understand clocks and 7 segment display circuits on the XCR board.
Design Description : Counter
The counter we will design must:
• Have a pause, reset and increasing count state.
• Must count from 0 to a maximum of 15.
• Must display its count using the 7 segment display provided by the XCR board.
Design Analisis
Counter
The counter we were asked to design is more complex than the one you saw in the lecture notes,
it has three states and it is represented by the state diagram in figure 1. A proposed block
diagram is show in figure 2.
7 Segment display (from XCR datasheet, Digilent Inc.)
From the lecture notes is understood that we need a display controller to implement the
translation table (figure 2.d from lecture notes) and the timing diagram (figure 3 from lecture
notes) for the dual-digit seven segment display on the XCR board. A proposed block diagram of
such a system is given in figure 3.
V1.0b @alnz 1
