EECS 140/ 141
Topics included in the second exam
(to be held on 04/ 16/ 2009 for Tu & Th Section)
(On 04/15/2009 for M, W, F Section)
Chapter 4
4.4: Incompletely specified functions
4.5: Multiple-output circuits
4.7: Analysis of multilevel circuits
Chapter 5
5.1: Conversion between different forms of number representation
5.2: Addition of unsigned numbers, Ripple Carry Adder
5.3: Negative numbers, especially 2’s complementary arithmetic
5.3.5: Arithmetic overflow
5.4.1: Carry-lookahead adders (Follow class notes, too)
5.6: Multiplication
5.7.2: Floating Point Numbers
5.8: ASCII Code
Chapter 6
6.1-6.1.1: Multiplexers, synthesis of a logic function
6.2: Decoders, designing one large decoder using several small
decoders,
demultiplexers
6.3: encoders
6.4: Code converters
6.5: Arithmetic comparison circuits
6.8: Shifter and Barrel Shifter
Chapter 7
7.1: Basic Latch and Characteristic Table
7.2: Gated SR latch
7.3: Gated D latch