Download Introduction to Embedded Systems - Midterm Exam 1 with Solutions | CS 120B and more Exams Computer Science in PDF only on Docsity!
~
VCR EE/CS120B, Spring 2002
Introduction to Embedded System Design Prof. Frank Vahid Midterm 1
VCR emai1:
- (25 points)Shortanswerand^ multiple choice a) Define Moore's Law
.3 1"'11/5 Ie
Approximatelyhow many transistorsarein a 32-bit ripple-carry adder?(circle one) 1 10 100~ 10,000 100,000 1,000,000 10,000,000 100,000,000 1,000,000, '---- c) What is a testbench? '3 (oar V
What's the difference between a VHDL entity and a VHDL component? List a key advantage of a geIlera1~purposeprocessor over a single-purpose processor. pro 9 'ftrW1Wfeo./blf' Supposea TV set-topbox processesa singlevideo frame using a 6-stagepipeline.Each stagetakes 100ns. Assume th~ next video frame can enter the pipestageas soon as the current frame passesthe fust stage.Ignore issues regardingpipeline fills and stalls.What arethe latencyand throughputof the system?Be sureto showyopr work and to clearly indicatethe units of your answers. :s :: j g) Supposean FPGA costs $20 and has NRE cost of $5000. Supposea gate-arraycosts $5 and has an NRE cost of $50,000.Ignoring all other factors, preciselydeterminethe volumesfor which eachtechnologyis most economical (show your work!). () \£ b) 7 d) : 7 e) 3" £ ::; ~ VO/UItt"Lt Vo((j~ wI ~~ :::: ~~ )(}O 01- ';>0 VI -: V"\ :
-^ <^ Q
Page 1 of 6 .,,> 1 00 ()
- (25^ points)Design^ a 4-bit counter/registerwith thefollowing functionality: Inputs:I (4 bits), load, shiftleft,clear, increment Outputs:0(4 bits) Description:The registermaintainsits previous value if all control inputs are 0, or if two or more control inputs are 1. Whenexactly one control input is one,the obviousaction is taken. Guidelines:You may useD flip-flops, multiplexors, decoders,comparators,adders,and minimal additionallogic gates, in your design. "
~
!¥IC
C'.K
0 0 0 0 ()
0 0
0 0 C> C) 0 () () c 0 0 0
6 0 0 0 " I ( I
() I 0
0 I
c) 0 ! I 0
\
0 0
()
0 D I U ! D ~ () ' I '
0
D d
I
~ (
2
s:-
( , s?- ~ Ils"'! eI( ';Vbt .1 l. I. I I '3 ::. (J s~1 el,.. \lilt' l' IJ sk 1 c.h ,'""e ~D:; ldl.~h \ I c\r "'(.' r Ii! "t.,' Ch,filllc' tv) [I.Wtv-",)! oU-tv!
~.#l
Page 2 of 6 ~~
~ (25 points) Designa single-purposeprocessorthat outputsthe maximumvalue of 5 given to useonly one comparator. Inputs:DO,D1, D2, D3, D4 (a1116-bits),andgo (bit) Output:max (16-bits) Function:When go becomes1, computethe Irulximumof the D's andwrite the result to the output max. Guidelines:(a) Start with C-like code,(b) convertto an FSMD (simplified if you'd like), and (c) split theFSMD into an FSM and a structuraldatapath.Remember,you can only use 1 comparator.Do not implementthe FSM. (d) Indicatehow manycycleslatencyyour processorhas.
C(A~
1 ,,0.1(^ iM~'t^ (!, ) --:1' !.J.. J'e.~()y
l W~l1ra5D
'7mr;.;.y... ) '> '/
~")(-= CO
0\
'MOI>Y-"'" ~-f )'-\ "'7 1M "'~ '-
7)0)
if
;$ 116.><;UVN./J 0'> OtII ~ S+M, vJ~ll", J6~ l, ~IJ 'jfJ,III' i tI' !/AII~ Cd>~ {j ,A-, v + ~ data inputs. You are restricted to (^) r o.\fII.r,/I w~ Bvn -" I.( [f) j)6^ ) I^01 D~^ D'f
II(
",. J L ~ \ '.,! ()I:) .."",.,.""., , ~~ iIA^ If IS "" ~ Page 5 of 6
