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Learning Module #2-2: PIC Instructions in Assembly Language
Programming
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Goals
Use assembly language programming to operate programmable intelligent computer (PIC) controlled devices.
Objectives
- Use assembly language formats.
- Use MPLAB IDE editor effectively.
- Explain the address boundary of PM and DM in different PIC16FXXX family members.
- Write PIC assembly codes.
- Compile PIC assembly codes.
- Distinguish different addressing modes to access DM registers.
- Explain the decision making process using PIC STATUS register flags.
- Use BTFSS or BTFSC for flag detection and decision.
Content
1. PIC Microcontroller Instructions
What gives the microcontroller its extreme versatility is its ability to be programmed. Anyone can buy a microcontroller for a few dollars but what gives it value in an application is the program or software that it is running. Every microcontroller or microprocessor has a built in Instruction Set. An instruction is nothing more than a binary combination that, when fetched and executed, will cause it to perform a specific task such as add two numbers or set a bit on an output port. A program is when a specific sequence of instructions is placed in program memory to meet some application specification such as control of the timing of injectors, control a wash cycle, etc. As we saw in an earlier session these binary combinations are better represented by hexadecimal numbers. In fact you have seen the program files that you have down-loaded into the trainer be described with the file extension ****.hex.
You could accomplish programming the PIC by just using hex numbers and carefully keep track of memory addresses using Machine Language , but there is an easier way. By programming in Assembly Language you can write the code with mnemonics and use labels to jump to or call rather than being concerned with memory addresses. In fact, by using Equates (EQU) statements you can refer to your variables and special function registers with text names. This relieves significant burden from programming in machine language.
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A mnemonic is a combination of letters that suggest the instruction’s purpose. For example:
Question : What do you think the instruction code Hex 2800 does? Discussion : You probably don’t have a clue and I don’t blame you. I don’t either. I would have to go and look it up. Question : What do you think the instruction GOTO does? Discussion : Most likely this is a bit easier to get a grasp on.
And that’s not all. A major advantage to the type of instruction set the PIC uses is that there are only 35 instructions in the instruction set. The following will give a more detailed description of Assembly Language.
One last thing before we go into the full discussion. When you program in Assembly Language you must follow the rules! If you don’t follow the compilers rules, you will have errors. You will also see that the file extension for your Assembly Language programs will be MyFirst. asm. After the program is compiled, the compiler will generate other files with the file extensions MyFirst. hex and MyFirst. lst.
The asm file: This is the source file. It is what you create that starts the whole thing rolling. The hex file: This is what you will download to the PIC. It has the machine code in it which is created when the asm file is compiled or assembled. The lst file: This is a combination of the asm and the hex files. It contains line numbers, addresses, code, how much memory used, variables, errors, warnings, and messages.
If you get an error, message, or warning, it may be hard to track down the cause in the asm file. The best way to handle this is to look at the lst file and search for the error, warning, or message. This will be shown directly above the line where the discrepancy is. However, don’t correct it in the lst file. You must correct it in the asm file and compile it again.
2. Assemble Language Format
The Cross Assembler allows source programs written and edited on the host computer (such as MPLAB IDE running on a PC) to generate executable codes for the target computer (system) such as PIC microcontroller. The executable object file (code) (the. HEX file) can then be downloaded (such as through PICKIT2 running on a PC) and run on the target system.
Assembly Language
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take several bytes to define them, thus taking longer to execute. It can take as many as 8 clock cycles to execute a single instruction.
Reduced Instruction Set Computer (RISC)
This instruction set consists of fewer, simpler, less sophisticated instructions. This leads to much faster execution then CISC systems. One important feature of the RISC system is that each instruction can be characterized by a single bye of data. The other major feature is that most RISC instructions execute in a single clock cycle.
3. PIC Instruction Sets & Registers
PIC16FXXX Microcontrollers Instructions List
Mnemonic Description Clock Cycles
Status Bit(s) affected
(1) ADDLW k ADD Literal with W 1 C,DC,Z (2) ADDWF f,d ADD W and f 1 C,DC,Z (3) ANDLW k AND Literal with W 1 Z (4) ANDWF f,d AND W with f 1 Z (5) BCF f,b Bit Clear f 1 None (6) BSF f,b Bit Set f 1 None (7) BTFSC f,b Bit Test f , Skip if Clear 1(2) None (8) BTFSS f,b Bit Test f , Skip if Set 1(2) None (9) CALL k Subroutine Call 2 None (10) CLRF f Clear f 1 Z (11) CLRW Clear W 1 Z (12) CLRWDT Clear Watchdog Timer 1 None (13) COMF f,d Complement f 1 Z (14) DECF f,d Decrement f 1 Z (15) DECFSZ f,d Decrement f , Skip if 0 1(2) None (16) GOTO k Unconditional Branch 2 None (17) INCF f,d Increment f 1 Z (18) INCFSZ f,d Increment f , Skip if 0 1(2) None (19) IORLW k Inclusive OR Litera l with W 1 Z (20) IORWF f,d Inclusive OR W with f 1 Z (21) MOVF f,d Move f 1 Z (22) MOVLW k Move Literal to W 1 None (23) MOVWF f Move W to f 1 None (24) NOP No Operation 1 None (25) RETFIE Return From Interrupt 2 INTOFF (26) RETLW k Return, Place Literal in W 2 None (27) RETURN Return From Subroutine 2 None (28) RLF f,d Rotate Left f thru Carry 1 C (29) RRF f,d Rotate Right f thru Carry 1 C (30) SLEEP Enter SLEEP Mode 1 INTWDT, INTOFF
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(31) SUBLW k Subtract W from Literal 1 C,DC,Z (32) SUBWF f,d Subtract W from f 1 C,DC,Z (33) SWAPF f,d Swap f 1 None (34) XORLW k Exclusive OR Literal with W 1 Z (35) XORWF f,d Exclusive OR W with f 1 Z
Note: f is the Register File d is the destination: 1 = Register File, 0 = W k is the Literal
Instruction details and examples including the effect on the STATUS flags.
(1) ADDLW ADD Literal With W (0X3E00) Description: Add contents of W register to contents of selected register. Result in W. Syntax: [ label ] ADDLW k Words: 1 (14 Bit) Cycles: 1 Opcode: 11 111x kkkk kkkk Status Bit(s) Affected: C,DC,Z Example 1: ADDLW 0X0F Example 2: ADDLW 0XF Before: W = 0X7C Before: W = 0XC After: W = 0X8B After: W = 0XB DC = 1 => There is a Carry from Bit3 to Bit4 C = 1 => There is a Carry from Bit7 to C
(2) ADDWF ADD W and f (0X0700) Description: Add contents of W register to contents of selected register. Result in W or f. Syntax: [ label ] ADDWF f,d Words: 1 (14 Bit) Cycles: 1 Opcode: 00 0111 dfff ffff Status Bit(s) Affected: C,DC,Z Example 1: ADDWF PCL,F Example 2: ADDWF TEMP,W Before: W = 0X7C PC = 0X
Before: W = 0XC TEMP = 0XE After: W = 0X7C PC = 0X2E
After: W = 0XAC TEMP = 0XE DC = 1 => There is a Carry from Bit3 to Bit
C = 1 => There is a Carry from Bit7 to C
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(6) BSF Bit Set f (0X1400) Description: Set selected bit in selected register to 1. Syntax: [ label ] BSF f,b Words: 1 (14 Bit) Cycles: 1 Opcode: 01 01bb bfff ffff Status Bit(s) Affected: None Example1: BSF STATUS,2 Example2: BSF TEMP, Before: STATUS = 0X68 Before: TEMP = 0X After: STATUS = 0X6C After: TEMP = 0X
(7) BTFSC Bit Test f, Skip if Clear (0X1800) Description: Test specified bit in selected register. Skip the next instruction if bit tested is clear ( 0 ). Syntax: [ label ] BTFSC f,b Words: 1 (14 Bit) Cycles: 1(2) Opcode: 01 10bb bfff ffff Status Bit(s) Affected: None Example1: BTFSC STATUS, GOTO LOOP GOTO MAIN
Example2: BTFSC TEMP, GOTO CODE
Before: PC = Address Before: PC = Address After: if Z = 0 => PC = MAIN Address if Z = 1 => PC = LOOP Address
After: if TEMP,7 = 0 => PC = Addr+ if TEMP,7 = 1 => PC = CODE Addr.
(8) BTFSS Bit Test f, Skip If Set (0X1C00) Description: Test specified bit in selected register. Skip the next instruction if bit tested is set ( 1 ). Syntax: [ label ] BTFSS f,b Words: 1 (14 Bit) Cycles: 1(2) Opcode: 01 11bb bfff ffff Status Bit(s) Affected: None Example1: BTFSS STATUS, GOTO LOOP GOTO MAIN
Example2: BTFSS TEMP, GOTO CODE
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Before: PC = Address Before: PC = Address After: if Z = 0 => PC = LOOP Address if Z = 1 => PC = MAIN Address
After: if TEMP,7 = 0 => PC = CODE Address if TEMP,7 = 1 => PC = Addr+
(9) CALL Subroutine Call (0X2000) Description: Call subroutine at specified starting address ( k ). Syntax: [ label ] CALL k Words: 1 (14 Bit) Cycles: 2 Opcode: 10 0kkk kkkk kkkk Status Bit(s) Affected: None Example: CALL SEARCH Before: PC = Address After: Return address (PC+1) is pushed onto stack and PC = SEARCH address Note: CALL is an 11 Bit Instruction and It Can Only Range Between 0X 000 - 0X7FF (Within 2048 Words)
(10) CLRF Clear f (0X0180) Description: Clear selected register to 0. Syntax: [ label ] CLRF f Words: 1 (14 Bit) Cycles: 1 Opcode: 00 0001 1fff ffff Status Bit(s) Affected: Z Example: CLRF COUNTER Before: COUNTER = 0XFC After: COUNTER = 0X Z = 1
(11) CLRW Clear W (0X0100) Description: Clear W register to 0. Syntax: [ label ] CLRW Words: 1 (14 Bit) Cycles: 1 Opcode: 00 0001 0xxx xxx Status Bit(s) Affected: Z
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Example1: DECF FLAG,W Example2: DECF TEMP,F Before: FLAG = 0X01 Before: TEMP = 0XFF After: FLAG = 0X W = 0X Z = 1
After: TEMP = 0XFE Z = 0
(15) DECFSZ Decrement f, Skip If 0 (0X0B00) Description: Decrement specified register. Skip next instruction if register contents = 0. Result in W or f. Syntax: [ label ] DECFSZ f,d Words: 1 (14 Bit) Cycles: 1(2) Opcode: 00 1011 dfff ffff Status Bit(s) Affected: None Example1 DECFSZ COUNTER,F GOTO CHAIN
Example2: DECFSZ COUNTER,W GOTO AGAIN Before: COUNTER = 0X6A PC = Address
Before: COUNTER = 0X PC = Address After: COUNTER = 0X PC = CHAIN Address
After: COUNTER = 0X W = 0X PC = Address+
(16) GOTO Unconditional Branch (0X2800) Description: Go to specified address ( k ). Syntax: [ label ] GOTO k Words: 1 (14 Bit) Cycles: 2 Opcode: 10 1kkk kkkk kkkk Status Bit(s) Affected: None Example: GOTO ROUTE Before: PC = Address After: PC = ROUTE Address Note: GOTO is an 11 Bit Instruction and It Can Only Range Between 0X000 - 0X7FF (Within 2048 Words)
(17) INCF Increment f (0X0A00) Description: Increment the selected register. Incrementing 0XFF results in 0X00. Result in W or f.
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Syntax: [ label ] INCF f,d Words: 1 (14 Bit) Cycles: 1 Opcode: 00 1010 dfff ffff Status Bit(s) Affected: Z Example1: INCF FLAG,W Example2: INCF TEMP,F Before: FLAG = 0X01 Before: TEMP = 0XFF After: FLAG = 0X W = 0X Z = 0
After: TEMP = 0X Z = 1
(18) INCFSZ Increment f, Skip If 0 (0X0F00) Description: Increment specified register. Skip next instruction if register contents = 0. Result in W or f. Syntax: [ label ] INCFSZ f,d Words: 1 (14 Bit) Cycles: 1(2) Opcode: 00 1111 dfff ffff Status Bit(s) Affected: None Example1: INCFSZ COUNTER,F GOTO CHAIN
Example2: INCFSZ COUNTER,W GOTO AGAIN Before: COUNTER = 0XFF PC = Address
Before: COUNTER = 0X PC = Address After: COUNTER = 0X PC = Address+
After: COUNTER = 0X W = 0X PC = AGAIN Address
(19) IORLW Inclusive OR Literal With W (0X3800) Description: OR contents of W register with literal (k) contained in instruction. Result in W. Syntax: [ label ] IORLW k Words: 1 (14 Bit) Cycles: 1 Opcode: 11 1000 kkkk kkkk Status Bit(s) Affected: Z
Example1: IORLW 0X0F Example2: IORLW 0XFF Before: W = 0X21 Before: W = 0X3C After: W = 0X2F After: W = 0XFF
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(22) MOVLW Move Literal To W (0X3000) Description: Load W register with literal (k). Syntax: [ label ] MOVLW k Words: 1 (14 Bit) Cycles: 1 Opcode: 11 00xx kkkk kkkk Status Bit(s) Affected: None Example: MOVLW 0X Before: W = 0XAA After: W = 0X Z = 1
(23) MOVWF Move W To f (0X0080) Description: Move a copy of W register’s contents into selected register. Syntax: [ label ] MOVWF f Words: 1 (14 Bit) Cycles: 1 Opcode: 00 0000 1fff ffff Status Bit(s) Affected: None Example: MOVWF TEMP Before: W = 0XAA TEMP = 0XCC After: W = 0XAA TEMP = 0XAA
(24) NOP No Operation (0X0000) Description: Do nothing for one instruction cycle. Uses up the clock cycle. Syntax: [ label ] NOP Words: 1 Cycles: 1 Opcode: 00 0000 0000 0000 Status Bit(s) Affected: None
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(25) RETFIE Return From Interrupt (0X0009) Description: Return from Interrupt. The W register is unaffected and INTOFF flag bit is cleared. Syntax: [ label ] RETFIE Words: 1 (14 Bit) Cycles: 2 Opcode: 00 0000 0000 1001 Status Bit(s) Affected: GIE Example: RETFIE Before: PC = Address of Interrupt Service Routine
After: PC = Top of Stack Content (address after Main Program where interrupted) GIE = 1 Note: RETFIE is a 1 4 Bit Instruction and it will return back to wherever it was called
(26) RETLW Return, Place Literal in W (0X3400) Description: Return from subroutine, load W register with literal (k) Syntax: [ label ] RETLW k Words: 1 (14 bits) Cycles: 2 Opcode: 11 01xx kkkk kkkk Status Bits Affected: None Example: MOVLW 0X 01 CALL PAGE_TABLE PAGE_TABLE ADDWF PCL,f RETLW 0X RETLW 0X RETLW 0X Before: W = 0 X 01 After: W = 0 X 04 Note: RETLW is 4 bit instruction and it can return wherever it was called from with data in W register
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Example1: RRF FSR,F Example2: RRF TEMP,W Before: FSR = B’1001 1010’ C = 1
Before: W = B’1111 1111’ TEMP = 0X23 C = 0 After: FSR = B’ C = 0
After: W = B’0111 1111’ TEMP = 0X23 C = 1
(30) SLEEP Enter SLEEP Mode (0X0063) Description: Shut down μC core (instruction oscillator) to reduce power consumption. Wake up via Reset , Watchdog Timer , or an external Interrupt. Syntax: [ label ] SLEEP Words: 1 (14 Bit) Cycles: 1 Opcode: 00 0000 0110 0011 Status Bit(s) Affected: TO, PD Example: SLEEP Before: PC = Address of Subroutine After: TO = 1, PD = 00 => WDT Prescaler and Oscillator Stopped
(31) SUBLW Subtract W From Literal (0X3C00) Description: Subtract contents of W register from the contents of selected register by 2’s complement arithmetic. Result in W. Syntax: [ label ] SUBLW k Words: 1 (14 Bit) Cycles: 1 Opcode: 11 110x kkkk kkkk Status Bit(s) Affected: C,DC,Z Example1: SUBLW 0X30 Example2: SUBLW 0X3C Before: W = 0X41 Before: W = 0XC After: W = 0XEF C = 0 => When Borrow occurs, the result is Negative
After: W = 0X C = 0 => When Borrow occurs, the result is Negative
Example3: SUBLW 0X69 Example4: SUBLW 0XAC Before: W = 0X21 Before: W = 0XAC After: W = 0X C = 1 => the Result is (+)
After: W = 0X Z =1 & C = 1 => the result is 0
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(32) SUBWF Subtract W From f (0X0200) Description: Subtract contents of W register from the contents of selected register by 2’s complement arithmetic. Result in W or f. Syntax: [ label ] SUBWF f,d Words: 1 (14 Bit) Cycles: 1 Opcode: 00 0001 dfff ffff Status Bit(s) Affected: C,DC,Z Example1: SUBWF PCL,F Example2 SUBWF TEMP,W Before: W = 0X PC = 0X30A
Before: W = 0X3C TEMP = 0X After: W = 0X PC = 0X2E
After: W = 0XC TEMP = 0X C= 0=> When Borrow occurs, the Result is Negative
C = 0 => When Borrow occurs, the Result is Negative
Example3: SUBWF TEMP,F Example4: SUBWF TEMP,W Before: W = 0X TEMP = 0X
Before: W = 0XAC TEMP = 0XAC After: W = 0X TEMP = 0X
After: W = 0X TEMP = 0XAC C = 1 => The Result is Positive C =1 => Z =1 & the Result is 0
(33) SWAPF Swap f (0X0E00) Description: Exchange the upper and lower nibbles (4 bits) of the selected register. Result in W or f. Syntax: [ label ] SWAPF f,d Words: 1 (14 Bit) Cycles: 1 Opcode: 00 1110 dfff ffff Status Bit(s) Affected: None Example: SWAPF COUNTER,W Before: COUNTER = 0X6C After: COUNTER = 0X6C W = 0XC
