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CSE370 Lecture 4: Logic Gates and Truth Tables, Lecture notes of Logic

Fort Scott Community CollegeLogic

Lecture 4 of cse370 covers the concepts of logic gates and truth tables, implementing logic functions, and canonical forms. Students learn how to go back and forth between truth tables, boolean expressions, and logic gates, as well as minimizing boolean expressions and drawing logic gates. The lecture also covers the implementation of a 1-bit binary adder and the optimization of logic designs.

What you will learn

  • What is the difference between a sum-of-products (SOP) and a product-of-sums (POS) canonical form?
  • What are logic gates and how are they used in computers?
  • How can we optimize logic designs to reduce the number of gates and complexity?

Typology: Lecture notes

2021/2022

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CSE370, Lecture 4
Lecture 4
◆Logistics
■HW1 due Wednesday at start of class
■Office Hours:
µMe: 12:20-1:00 CSE 668 plus one later this week
µTAs: Today at 3:30, tomorrow at 12:30 & 2:30 in CSE 220
■Lab2 going on this week
◆Last lecture --- Boolean algebra
■Axioms
■Useful laws and theorems
■Simplifying Boolean expressions
◆Today’s lecture
■Logic gates and truth tables in detail
■Implementing logic functions
■Canonical forms
2
CSE370, Lecture 4
The “WHY” slide
◆Logic Gates and Truth Tables
■Now you know 0’s and 1’s and the basic Boolean algebra, now you
are ready to go back and forth between truth table, Boolean
expression, and logic gates. This ability to go back and forth is an
extremely useful skill designing and optimizing computer hardware.
◆Implementing Logic Functions
■Now with these basic tools you learned, you can “implement” logic
functions. We use Boolean algebra to implement logic functions that
are used in the computers. And these logic functions are used by
computer programs you write.
◆Canonical forms
■There are many forms to expression one Boolean function. It is
good to have one standard way. A canonical form is the standard
form for Boolean expressions. It has a nice property that allows you
to go back and forth between truth table/expressions/gates easily.
3
CSE370, Lecture 4
X Y Z
0 0 0
0 1 0
1 0 0
1 1 1
X
YZ
X Y Z
0 0 0
0 1 1
1 0 1
1 1 1
X
YZ
Logic gates and truth tables
◆AND X•Y XY
◆OR X+Y
◆NOT X X’
◆Buffer X
X Y
0 1
1 0
XY
X Y
0 0
1 1
XY
4
CSE370, Lecture 4
X Y Z
0 0 1
0 1 1
1 0 1
1 1 0
X
YZ
Logic gates and truth tables (con’t)
◆NAND
◆NOR
◆XOR
◆XNOR
X
Y
•
XY
X
Y
+
X
Y
⊕
X
Y
⊕
X Y Z
0 0 1
0 1 0
1 0 0
1 1 0
Z
X
Y
X Y Z
0 0 0
0 1 1
1 0 1
1 1 0
X
YZ
X Y Z
0 0 1
0 1 0
1 0 0
1 1 1
Z
X
Y
5
CSE370, Lecture 4
◆Example: F = (A•B)’ + C•D
◆Example: F = C•(A+B)’
Boolean expressions logic gates
F
A
B
C
D
A
B
CF
6
CSE370, Lecture 4
Truth tables logic gates
◆Given a truth table
■Write the Boolean expression
■Minimize the Boolean expression
■Draw as gates
■Example:
A B C F
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 0
1 1 1 1
F = A’BC’+A’BC+AB’C+ABC
= A’B(C’+C)+AC(B’+B)
= A’B+AC
pf3
pf4

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CSE370, Lecture 4 1

Lecture 4

u Logistics

n HW1 due Wednesday at start of class n Office Hours:  Me: 12:20-1:00 CSE 668 plus one later this week  TAs: Today at 3:30, tomorrow at 12:30 & 2:30 in CSE 220 n Lab2 going on this week

u Last lecture --- Boolean algebra

n Axioms n Useful laws and theorems n Simplifying Boolean expressions

u Today’s lecture

n Logic gates and truth tables in detail n Implementing logic functions n Canonical forms

CSE370, Lecture 4 2

The “WHY” slide

u Logic Gates and Truth Tables n Now you know 0’s and 1’s and the basic Boolean algebra, now you are ready to go back and forth between truth table, Boolean expression, and logic gates. This ability to go back and forth is an extremely useful skill designing and optimizing computer hardware.

u Implementing Logic Functions n Now with these basic tools you learned, you can “implement” logic functions. We use Boolean algebra to implement logic functions that are used in the computers. And these logic functions are used by computer programs you write.

u Canonical forms n There are many forms to expression one Boolean function. It is good to have one standard way. A canonical form is the standard form for Boolean expressions. It has a nice property that allows you to go back and forth between truth table/expressions/gates easily.

CSE370, Lecture 4 3

X Y Z

X

Y Z

X Y Z

X

Y

Z

Logic gates and truth tables

u AND X•Y XY

u OR X+Y

u NOT X X’

u Buffer X

X Y

X Y

X Y

X Y

CSE370, Lecture 4 4

X Y Z 0 0 1 0 1 1 1 0 1 1 1 0

X Y Z

Logic gates and truth tables (con’t)

u NAND

u NOR

u XOR

u XNOR

X • Y XY

X +Y

X ⊕Y

X ⊕Y

X Y Z 0 0 1 0 1 0 1 0 0 1 1 0

Z

X Y

X Y Z 0 0 0 0 1 1 1 0 1 1 1 0

X Y Z

X Y Z 0 0 1 0 1 0 1 0 0 1 1 1

Z

X Y

u Example: F = (A•B)’ + C•D

u Example: F = C•(A+B)’

Boolean expressions logic gates

F

A B C D A B C

F

Truth tables logic gates

u Given a truth table

n Write the Boolean expression n Minimize the Boolean expression n Draw as gates n Example:

A B C F 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 1

F = A’BC’+A’BC+AB’C+ABC

= A’B(C’+C)+AC(B’+B)

= A’B+AC

CSE370, Lecture 4 7

u 1-bit binary adder

n Inputs: A, B, Carry-in n Outputs: Sum, Carry-out

A B Cin Cout Sum 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

Cout = A'BCin + AB'Cin + ABCin' + ABCin

Both Sum and Cout can be minimized.

Sum = A'B'Cin + A'BCin' + AB'Cin' + ABCin

Example: A binary full adder

A

B

Cin Cout

Adder Sum

CSE370, Lecture 4 8

Full adder: Sum

Before Boolean minimization Sum = A'B'Cin + A'BCin'

  • AB'Cin' + ABCin

After Boolean minimization Sum = (A⊕B) ⊕ Cin

CSE370, Lecture 4 9

Before Boolean minimization Cout = A'BCin + AB'Cin

  • ABCin' + ABCin

After Boolean minimization Cout = BCin + ACin + AB

Full adder: Carry-out

CSE370, Lecture 4 10

Preview: A 2-bit ripple-carry adder

A 1 B 1

Cin Cout

Sum 1

A

Sum

Cin Cout

B

1-Bit Adder

A 2 B 2

Sum 2

0 Cin^ Cout

Overflow

Many possible mappings

u Many ways to map expressions to gates

n Example: Z =^ A •^ B •^ (C^ +D ) =^ A •^ B •^ (C^ +D)

_ _ _ _

What is the optimal gate realization?

u We use the axioms and theorems of Boolean algebra

to “optimize” our designs

u Design goals vary

n Reduce the number of gates? n Reduce the number of gate inputs? n Reduce number of chips and/or wire?

u How do we explore the tradeoffs?

n Logic minimization: Reduce number of gates and complexity n Logic optimization: Maximize speed and/or minimize power n CAD tools

CSE370, Lecture 4 19

Canonical implementations of F = AB + C

CSE370, Lecture 4 20

Conversion between canonical forms

u Minterm to maxterm

n Use maxterms that aren’t in minterm expansion

n F(A,B,C) = ∑m(1,3,5,6,7) = ∏M(0,2,4)

u Maxterm to minterm

n Use minterms that aren’t in maxterm expansion

n F(A,B,C) = ∏M(0,2,4) = ∑m(1,3,5,6,7)

u Minterm of F to minterm of F'

n Use minterms that don’t appear

n F(A,B,C) = ∑m(1,3,5,6,7) F'(A,B,C) = ∑m(0,2,4)

u Maxterm of F to maxterm of F'

n Use maxterms that don’t appear

n F(A,B,C) = ∏M(0,2,4) F'(A,B,C) = ∏M(1,3,5,6,7)

CSE370, Lecture 4 21

SOP, POS, and de Morgan's theorem

u Sum-of-products

n F' = A'B'C' + A'BC' + AB'C'

u Apply de Morgan's to get POS

n (F')' = (A'B'C' + A'BC' + AB'C')' n F = (A+B+C)(A+B'+C)(A'+B+C)

u Product-of-sums

n F' = (A+B+C')(A+B'+C')(A'+B+C')(A'+B'+C)(A'+B'+C')

u Apply de Morgan's to get SOP

n (F')' = ((A+B+C')(A+B'+C')(A'+B+C')(A'+B'+C)(A'+B'+C'))' n F = A'B'C + A'BC + AB'C + ABC' + ABC