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University of California, Berkeley College of Engineering Computer Science Division EECS Fall 2010 John Kubiatowicz
Midterm I
SOLUTIONS
October 18th, 2010 CS162: Operating Systems and Systems Programming
Your Name:
SID Number: Circle the letters of CS Login
First: a b c d e f g h I j k l m n o p q r s t u v w x y z Second: a b c d e f g h I j k l m n o p q r s t u v w x y z
Discussion Section:
General Information: This is a closed book exam. You are allowed 2 pages of notes (both sides). You may use a calculator. You have 3 hours to complete as much of the exam as possible. Make sure to read all of the questions first, as some of the questions are substantially more time consuming.
Write all of your answers directly on this paper. Make your answers as concise as possible. On programming questions, we will be looking for performance as well as correctness, so think through your answers carefully. If there is something about the questions that you believe is open to interpretation, please ask us about it!
Problem Possible Score
Total 100
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Problem 1f[2pts]: “ Hyperthreading” is a term used to describe systems with thousands of threads.
True / False
Explain: Hyperthreading refers to a hardware-multithreading technique that
interleaves a small number of threads on a cycle-by-cycle basis to maximize the utilization of the processor pipeline.
Problem 1g[2pts]: A Lottery Scheduler can be used to implement any other scheduling algorithm by adjusting the number of tickets that each process holds.
True / False
Explain: A lottery scheduler cannot be used to implement strict priority scheduling.
Problem 1h[2pts]: A MicroKernel can improve the resilience of a system against bugs in the OS.
True / False
Explain: By isolating components of the system (such as file system, network stack,
etc.) in their own address spaces, we gain resilience against bugs because buggy components are prevented from interfering with other components by the address-space isolation.
Problem 2: Short Answer [22pts] Problem 2a[2pts]: What is priority donation and why is it important?
Priority donation is the process of promoting the priority of lock holders to be equal to that of the corresponding lock-waiters in order to prevent priority inversion (a situation in which a high-priority process ends up waiting on a low-priority process). Priority donation helps to avoid variety of bad situations that can arise from priority inversion such as livelocks or other violations of resource usage that result from not adhering to the priority scheme.
Problem 2b[3pts]: Name three ways in which the processor can transition from user mode to kernel mode. Can the user execute arbitrary code after transitioning?
Some examples include (you only need three): (1) User executing a yield() system call (2) User executing an arbitrary system call (such as for I/O) (3) External interrupt (such as a timer interrupt) (4) System fault (such as a divide-by-zero or memory error). (5) Page Fault No, the user is not able to execute arbitrary code, because all of the entrypoints to the kernel are carefully enforced by the hardware. To say this another way, the hardware makes sure that all transitions to kernel mode are accompanied by entry into a well-defined set of entry points.
Problem 2c[2pts]: What happens when an interrupt occurs? What does the interrupt controller do?
Assuming that the interrupt is currently enabled, the hardware saves the PC, disables interrupts, then jumps to an interrupt vector based on the type of interrupt. Typically, the interrupt handler adjusts which interrupts are enabled and saves all registers (including the stack pointer) before proceeding to service the interrupt. The interrupt controller provides an interface that allows the kernel to control which interrupts are enabled.
Problem 2d[2pts]: Explain how to fool the multi-level feedback scheduler’s heuristics into giving a long-running task more CPU cycles.
The multi-level feedback scheduler uses the time between bursts (i.e. between I/O operations) to distinguish between interactive and background tasks. Long-running tasks are typically run at lower priority. By inserting a bunch of I/O (say printfs) into the long-running task, one can fool the multi-level feedback scheduler into thinking that the long-running tasks is actually interactive and should be run at higher priority.
Problem 2i[4pts]: Here is a table of processes and their associated arrival and running times.
Process ID Arrival Time CPU Running Time Process 1 0 2 Process 2 1 6 Process 3 4 1 Process 4 7 4 Process 5 8 3
Show the scheduling order for these processes under 3 policies: First Come First Serve (FCFS), Shortest-Remaining-Time-First (SRTF), Round-Robin (RR) with timeslice quantum = 1. Assume that context switch overhead is 0 and that new processes are added to the head of the queue except for FCFS, where they are added to the tail.
Time Slot FCFS SRTF RR
0 1 1 1
1 1 1 2
2 2 2 1
3 2 2 2
4 2 3 3
5 2 2 2
6 2 2 2
7 2 2 4
8 3 2 5
9 4 5 2
10 4 5 4
11 4 5 5
12 4 4 2
13 5 4 4
14 5 4 5
15 5 4 4
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Assume that our system uses Mesa scheduling and that condition variables have FIFO wait queues. Below is a sketch of a solution that uses only two condition variables and that does return results as if requests were processed in logical arrival order. Rather than separate methods for Reader() and Writer(), we have a single method which takes a “NewType” variable (0 for read, 1 for write):
- Lock MonitorLock; // Methods: acquire(),release()
- Condition waitQueue, onDeckQueue;// Methods: wait(),signal(),broadcast()
- int Queued = 0, onDeck = 0; // Counts of sleeping threads
- / Missing code /
- Accessor (int NewType) { // type = 0 for read, 1 for write
- /* Monitor to control entry so that one writer or multiple readers */
- MonitorLock.acquire();
- / Missing wait condition /
- { Queued++;
- waitQueue.wait();
- Queued—;
- }
- / Missing wait condition /
- { onDeck++;
- onDeckQueue.wait();
- onDeck--;
- }
- / Missing code /
- MonitorLock.release();
- // Perform actual data access
- AccessDatabase(NewType);
- / Missing code /
- }
The waitQueue condition variable keeps unexamined requests in FIFO order. The onDeckQueue keeps a single request that is currently incompatible with requests that are executing. W e want to allow as many parallel requests to the database as possible, subject to the constraint of obeying logical arrival order. Here, logical arrival order is defined by the order in which requests acquire the lock at line #7.
Problem 3c[2pts]: What additional variable(s) (and initialization) do you need at Line #4? Hint: think about what you need to describe the current set of threads accessing the database in parallel. Give explicit code to insert at Line #4 (can be more than one line of actual code).
We need to know which type of request is currently occurring and how many of these requests are occurring in order to adhere to the Readers-Writers conditions (multiple reads or one write at a time). Although we can accomplish this requirement in multiple ways, the following works: int CurType = 0; int NumAccessing = 0;
Problem 3d[2pts]: Explain why you might not want to use a “while()” statement in Line #8 – despite the fact that the system has Mesa scheduling :
Because a while loop will potentially reorder requests on the waitQueue condition variable – and we want to keep requests in their original logical arrival order. Thus whatever we do, we do not want to execute waitQueue.wait()more than once per thread.
Problem 3e[2pts]: What is the missing code in Line #8? Hint: it is a single “if” statement.
If anyone in the system is waiting, then we want to wait so that we don’t get ahead of others (i.e. so that we preserve the logical arrival order):
if (Queued + onDeck > 0)
Problem 3f[2pts]: What is the missing code in Line #13? This should be a single line of code.
If the current request is incompatible with the set of executing requests, then we have to wait:
while ((NumAccessing > 0) && (NewType == 1 || CurType == 1))
You could also use an “if” here, but then you would need to conditionalize the “onDeckQueue.signal()” statement in (3h).
Problem 3g[2pts]: What is the missing code in Line #18? You should not have more than three (3) actual lines of code.
NumAccessing++; // Have another thread accessing the database CurType = NewType; // In case we are first of new group waitQueue.signal(); // Wake up next thread (if they exist)
Problem 3h[3pts]: What is the missing code in Line #22? You should not have more than five (5) actual lines of code.
MonitorLock.acquire(); NumAccessing--; // One less accessing onDeckQueue.signal(); // Wake up someone stalled on conflict MonitorLock.release();
If you use an “if” in (3h), then need this instead of the above signaling if(NumAccessing ==0) onDeckQueue.signal(); // Wake up someone stalled on conflict
Problem 3i[3pts]: Suppose that condition variables did not have FIFO ordered wait queues. What changes would you have to make to your code? Be explicit (you should not need more than 6 new or changed lines). Hint: consider assigning a sequentially increasing ID to each thread.
New variables to track sequential IDs added to Line #4: int HeadID = 0, TailID = 0; //(NEW) New code for Line #8 (one new line, one changed line): int MyCurrentID = TailID++; //(NEW)Next logical ID to new request while (MyCurrentID != HeadID) //(CHANGED)
Finally, code for Line #18 is slightly different (only added 1 line, changed 1 line): NumAccessing++; //(UNCHANGED LINE) CurType = NewType; //(UNCHANGED LINE) HeadID++; //(NEW) Next in-order thread can wake waitQueue.broadcast(); //(CHANGED) Wake up next thread in order
Problem 4: Deadlock [24pts] Problem 4a[2pts]: Suppose that we utilize the Banker’s algorithm to determine whether or not to grant resource requests to threads. The job of the Banker’s algorithm is to keep the system in a “SAFE” state. It denies resource requests by putting the requesting thread to sleep if granting the request would cause the system to enter an “UNSAFE” state, waking it only when the request could be granted safely. What is a SAFE state?
In a safe state, there is some ordering of the threads in the system such that threads can complete, one after another without deadlocking and without requiring threads to give up resources that they already have.
Problem 4b[4pts]: The figure at the right illustrates a 2D mesh of network routers. Each router is connected to each of its neighbors by two network links (small arrows), one in each direction. Messages are routed from a source router to a destination router and can stretch through the network (i.e. consume links along the route from source to destination). Messages can cross inside routers. Assume that no network link can service more than one message at a time, and that each message must consume a continuous set of channels (like a snake). Messages always make progress to the destination and never wrap back on themselves. The figure shows two messages (thick arrows). Assume that each router or link has a very small amount of buffer space and that each message can be arbitrarily long. Show a simple situation (with a drawing) in which messages are deadlocked and can make no further progress. Explain how each of the four conditions of deadlock are satisfied by your example. Hint: Links are the limited resources in this example.
Answer: The simplest deadlock example is a set of four messages in a loop (as shown in the figure at the left). Each message is blocked attempting to make a counter-clockwise turn by a message utilizing the target channel. Four conditions:
_1. Mutual Exclusion: Each channel held by one message at a time
- Hold and Wait: messages hold channels while waiting to acquire_ _other channels
- No preemption: Channels can not be preempted from messages_ _after they are acquired by them
- Circular wait: We have a cycle of waiting here – four messages_
R R R R
R R R R
R R R R
R R R R
R R R R
R R R R
R R R R
R R R R
RRR RRR RRR RRR
RRRR RRRR RRRR RRRR
RRRR RRRR RRRR RRRR
RRRR RRRR RRRR RRRR
R R
R R
R R
R R
RR RR
RR RR
Problem 4c[3pts]: Define a routing policy that avoids deadlocks in the network of (4b). Prove that deadlocks cannot happen when using this routing policy. Hint: assume that a deadlock occurs and show why that leads to a contradiction in the presence of your new routing policy.
Several answers are possible here. The one given in class was to force messages to route in the X direction first, then Y. To prove that deadlocks cannot occur, assume that one did occur. Then, such a deadlock would involve a cycle in messages. However, such a cycle would involve at least one message that routed from the Y direction to the X direction (in fact, at least 2 of them). Since we have disallowed such a route, this cycle cannot exist. Thus, no deadlocks can exist.
Problem 4d[3pts]: Suppose that we wanted a less restrictive routing policy than your answer to (4c). Explain why the Banker’s algorithm is not well adapted to this routing problem. What could you do that was similar in spirit to the Banker’s algorithm to prevent deadlock in networks such as (4b), while allowing arbitrary routing of messages? Why is it unlikely that such an algorithm would be used in a real network?
The problem here is that the resource needs of a message depends on the current location of its head, while the Banker’s algorithm requires declaration of resource needs prior to routing. The Banker’s algorithm is so conservative that it would allow only a small number of messages to be present in the network at the same time. What one could do is to have each message request its next link from a deadlock-avoider that checks inflight messages to see if they could still be drained from the network if the link request were granted. Although this mechanism would be in the spirit of the Banker’s algorithm, it is very expensive (requires essentially routing all messages to their destinations to decide whether the system would deadlock).
Problem 4e[2pts]: Is it possible for a system with a single monitor (i.e one lock with multiple condition variables) to deadlock? Explain.
Yes. The lock provides a guard on the condition variables, which could be involved in a circular wait condition. The simplest way to see this situation is to construct two semaphores from one monitor with two condition variables. For instance:
X.p() lock.acquire(); X.v() lock.acquire();
while (Xcount = 0) Xcount++; Xcondition.wait(); Xcondition.signal() Xcount—; lock.release(); lock.release();
Same for semaphore Y. Then, set up a circular wait condition:
Thread 1 Thread 2 X.p() Y.p() Y.p() X.p()
Problem 4g[3pts]: Assume that we start with a system in the state of (4f). Suppose that T1 asks for 2 more copies of resource A. Can the system grant this if it wants to avoid deadlock (i.e. will the result be a SAFE state)? Explain.
No. This cannot be granted. Assume that T1 gets 2 more of A. Then, our available allocation is:
Then, looking at our needed allocations, we see:
At this point, the available allocation is insufficient to start any of the threads, much less find a safe sequence that finishes all of them.
Problem 4h[3pts]: Assume that we start with a system in the state of (4f). What is the maximum number of additional copies of resources (A, B, and C) that T1 can be granted in a single request without risking deadlock? Explain.
We cannot ask for more than (A,B,C)=(2,1,1) since this is all that is available. However, the previous problem showed that A must be < 2. Further, note that the resources given to T1 are tied up until the very end of the execution (look at sequence in 4f).
Thus, looking at our safe sequence from 4f, we can see that it can still work if it is missing one A and one C. Just work through it with the first “Available Before” allocation of 1,1,0 instead of 2,1,1. However, it will not work if it is missing one more B (we would be unable to execute T4 in the sequence), i.e. setting “Available Before” to 1,0,0 prevents the execution of T4.
Thus the maximum number of additional resources that can be requested by T1 is (A,B,C)=(1,0,1)
Available A B C 0 1 1
Thread ID
Needed Allocation A B C T1 0 8 1 T2 4 1 0 T3 1 0 0 T4 2 7 0
Problem 5: Virtual Memory [18pts] Consider a two-level memory management scheme on 24-bit virtual addresses using the following format for virtual addresses:
Virtual Page # (8 bits)
Virtual Page # (8 bits)
Offset (8 bits)
Virtual addresses are translated into 16-bit physical addresses of the following form:
Physical Page # (8 bits)
Offset (8 bits)
Page table entries are 16 bits in the following format, stored in big-endian form in memory (i.e. the MSB is first byte in memory).
Page Table Entry (PTE)
Physical Page # (8 bits)
Kernel OnlyUncacheable
0 0
DirtyUse WriteValid
Note that a virtual-physical translation can fail at any point if an incompatible PTE is encountered. Two types of errors can occur during translation: “invalid page” (page is not mapped at all) or “access violation” (page exists, but access was illegal).
Problem 5a[2pts]: How big is a page? Explain.
Pages are 256 bytes in size (2Offset^ ) = (2^8 ).
Problem 5b[2pts]: What is the largest size for a page table with this address space? We are asking for the total size of both levels of the page table. Explain.
The largest page table would occur when there is a mapping for all pages in the address space. All entries would be filled at both levels of the page table. In this double-level page table, there will be 1 page-table chunk at the top level and 2^8 page-table chunks at the second level for a total of 1+2^8 chunks. Each chunk has 2^8 ×SizeOf(PTE) = 512 bytes. Thus, the total size of the full page table is: (1+2^8 ) × (512) = 131584.
Problem 5c[3pts]: What does “TLB” stand for and what is its function? How big would a TLB entry be for this system?
“TLB” stands for Translation Lookahead Buffer. It serves as a cache for translations from the page table. Each TLB entry would contain a virtual page # (16 bits), a PTE (16 bits), and a valid bit (1 bit) for a total of 33 bits. Since there are two zero bits in the PTE, one could argue that the TLB entry only needs 31 bits.
Virtual Address Format
Virtual Page # (8 bits)
Virtual Page # (8 bits)
Offset (8 bits)
Page Table Entry (PTE)
Physical Page # (8 bits)
Kernel Not
Cacheable 0 0
DirtyUse WriteValid
Physical Memory
Address +0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +A +B +C +D +E +F
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