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An in-depth overview of transistor biasing techniques, including dc load line, ac load line, and selection of operating point. It discusses the need for biasing and various biasing techniques such as fixed bias, collector to base bias, and self-bias, along with their stability factors. The document also covers bias compensation techniques, including diode compensation for instability due to vbe and ico variations. The content covers fundamental concepts in transistor biasing, which are crucial for understanding the design and operation of transistor amplifier circuits. This information would be highly relevant for students studying electronics, electrical engineering, or related fields, as it lays the foundation for understanding the practical implementation of transistor-based circuits.
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DC load line, AC load line and selection of operating point, need for biasing,
various biasing techniques: fixed bias, collector to base bias and self bias with
stability factors. Various compensation circuits, thermal runaway and thermal
stability.
OBJECTIVES
To familiarize the students about the different load line and the need for biasing. To familiarize the students about the different biasing techniques.
OUTCOMES
After the completion of the unit the students will be able to
Bias a given transistor. Connect the compensation circuit.
TEXTBOOKS
REFERENCES
Introduction: -
This chapter introduces methods for establishing the quiescent operating point of a transistor amplifier in the active region of the characteristics. Due to changes in temperature „T‟, the operating point shifts to a new value because the transistor parameters (β, ICO , VBE ) are functions of „T‟. The stability of different biasing circuits is compared by establishing certain criterion. Compensation techniques are also presented for quiescent-point stabilization.
DC load line (or) Static load line: -
Consider a common-emitter circuit as shown below, which has capacitors with negligible reactance at the lowest frequency of operation.
The ratings maximum collector dissipation PC(max), maximum collector voltage VC(max), maximum collector current IC(max) and maximum emitter-to-base voltage VEB(max) will limit the range of useful operation in the active region even though RC, RL, RB and VCC can be chosen freely.
Let us suppose that RC is selected so that the dc line is drawn as shown in figure by approximately locating the co-ordinates on the both axes.
VCC
RC IC IB
RB
VBE -
IE
RL
Output Signal, v 0
Signal Input, vi
i.e., ̍
The AC load line must be drawn through operating point Q 1 as indicated in DC load line and must have a slope corresponding to R^ ′L^ =RC || RL. The figure below shows common-emitter collector characteristics, AC and DC lines of a typical transistor.
In the above fig, the input may swing a maximum of approximately 40μA around Q 1 and if a larger input swing is available, the transistor output may get deteriorated due to cut-off during a part of the input cycle. So another operating point Q 2 is selected on the DC load line where it meets higher current in the collector characteristics (here it is 60μA). So point Q 2 is now operating point for the AC load line where it passes through, with a slope corresponding to RL^ ′^ =RC || RL.
120 μA 100 μA (^80) μA 60 μA
40 μA
PC(max )
IC , mA
IC(max )
vcc RC
IB = 140 μA
20 μA
Selection of the operating point: -
In general, a transistor functions linearly when it is constrained to operate in its active region. The basic application of a transistor when operating in its active region is amplification. With same waveform as that applied at the input, if the output signal is not a faithful reproduction of the input signal, for example if it is clipped on one side, there should be one factor to be examined. This is popularly known as operating point or Q-point.
To establish an operating point, it is necessary to provide appropriate direct potentials (using VCC), currents (using RC, RL etc) using external sources. Once the operating point or Q-point is selected the output should have the same waveform as that of input and if any change occurs, the operating point should be relocated by the correct use of external sources.
Need for Biasing: -
To operate the transistor in the active region, the supply voltages and resistances should establish a set of DC voltages VCEQ and DC currents ICQ to produce distortion free output in the amplifier circuits. These voltages and currents are called quiescent (no - i/p) values which determine the operating point or Q-point for the transistor.
The process of selecting proper supply voltages and resistors for obtaining the desired Q-point is called Biasing. Biasing circuits are used to get proper and desired operating point.
When transistor is used as an amplifier, establishment of operating point in the active region is necessary and is achieved by biasing.
Often Q-point is established near the center of active region of transistor characteristic to allow similar signal swings in positive and negative directions.
IC=βIB +ICEO
As ICEO is very small, IC≅ βIB
∴IC= β VCC^ R−bVBE
Here β, VCC, VBE are constants for a transistor.
∴IC depends up on Rb.
To get constant IC in active region, suitable values of Rb are chosen.
∴Rb = β^ VCC I^ C−VBE or Rb ≅ βV ICCC
as VBE << VCC
Similarly, Writing KVL to the collector-emitter circuit, we get
-VCC+ ICRC+VCE= 0
=> VCE = VCC − ICRC
Stability Factor ‘S’: -
The stability factor „S‟ is defined as the ratio of change of collector current IC with respect to the reverse saturation current ICO, keeping β and VBE constant.
i.e. S= (^) ∂∂IICOC ≃ (^) ΔΔIICOC ⎪VBE ,β=constant
We know that, collector current of CE configuration is given by
IC= βIB +ICEO
IC= βIB +(1+ β)ICO------------->(1)
Differentiating eq(1) w.r.t IC, keeping β constant.
1= β ∂ ∂IIBC + (1+ β) ∂ ∂ICOIC
=> (1+ β) ∂ ∂ICOIC = 1− β ∂ ∂IIBC
CO
= (1+^ β) 1 − β∂ ∂IIBC
∴S = (1+^ β) 1 − β∂ ∂IIBC
For fixed bias circuit,
IB= VCC^ R−bVBE
∴ eq(2) becomes,
S=1+ 1 −β 0 = 1+ β
∴ If β=150, then S=151 which means that IC is dependent on ICO by 151 times and in turn on temperature. So any small variations in temperature or ICO, IC changes abruptly and stability decreases. So fixed bias circuit has high „S‟ and poor stability.
Stability Factor ‘ 𝐒′^ ’: - The stability factor „S′^ ‟ is defined by the variation of IC with VBE and is given by
S′^ = (^) ∂∂VIBEC ⎪ICO ,β=constant
For fixed-bias circuit, We have IC= βIB + (1+ β)ICO
IB=VCC^ R−bVBE
β VCC^ R−bVBE + (1+ β)ICO ----------------->(3)
In this circuit, the biasing resistor (Rb ) is connected between collector and base of the transistors.
Analysis: -
Writing KVL to the base-emitter circuit VCC− (IB+IC) RC − IB Rb − VBE=
=>VCC = IB (Rb +RC) + ICRC + VBE
=>IB = VCC^ − RVCBE +R^ −bIC^ RC -------------> (1)
Similarly, writing KVL to the collector-emitter circuit, −VCC + (IB+IC) RC + VCE=
=>VCE=VCC − (IB+IC) RL------------> (2)
Stability factor S: -
We know that,
S= 1+β 1 −β∂ ∂IIBC
From Eq.(1) ∂IB ∂IC^ =^
−RC RC +Rb
∴S= 1+β 1 −β (^) R −C R +R Cb
= 1+β 1+ (^) R βC^ R +R Cb
The stability factor S is smaller than 1+β, so an improvement in stability is obtained as compared to fixed bias circuit. Also „S‟ can be made smaller by making Rb small or RC large.
Stability Factor 𝐒′^ : -
We know that
S′^ = (^) ∂∂VIC BE
⎪β,ICO =constant
We have from eq (1)
IB = VCC^ − RVBE^ −IC^ RC C +Rb But IC = β IB
∴IC = β VCC^ − RVCBE +R^ −bIC^ RC
Differentiating above equation w.r.t IC, we get
1= (^) R−β C +Rb
∂VBE ∂IC^ –^ β^
RC RC +Rb^ (By keeping^ β, ICO^ constants)
=>1+ β (^) RRC C +Rb
= − (^) R β C +Rb
∂VBE ∂IC
∴ ∂ ∂VIBEC RC β+Rb = − RC^ +R RC +Rb^ +βbRC
∴ (^) ∂∂VIBEC = (^) Rb +(1+−ββ)RC
∴ S′^ = (^) ∂∂VIBEC = (^) 1+β−β RC +Rb
As the denominator is always greater than numerator, S′^ will always be smaller and there will be a great improvement in the stability factor S′^ with changes in VBE.
Stability Factor S′′: -
In the above analysis, we have
IC = β(VCC^ R−bV +RBE^ −CIC^ RC^ )
Differentiating the above equation w.r.t β, we get
If the current IC increases due to change in temperature (or) change in β, the emitter current IE also increases and hence the voltage drop across RE increases, reducing the voltage difference between base and emitter (VBE).Due to reduction in VBE, base current IB and hence collector current IC also reduce. Therefore, negative feedback exists in the emitter bias circuit.
Analysis: -
From the Thevenin‟s equivalent circuit
vTh = (^) R 1 R+R^22 vCC ----------------> (1)
And
Rb = RTh = R 1 || R 2 = (^) RR^1 R^2 1 +R 2
Also applying KVL to the base-emitter circuit
VTh = IB +RTh +vBE + (IB+IC) RE --------------------> (3) Similarly
VCE = VCC - IC (RC+RE) (∵
=>IC=V RCCC^ +R−VCEE ------------------------> (4)
Stability Factor ‘S’: -
We know that
S= (^1) −β1+β∂IB ∂IC Differentiating eq (3) w.r.t IC, considering VBE as constant we get
0 = ∂ ∂IIBC RTh + ∂ ∂IIBZ RE + RE
∴ ∂ ∂IIBC = (^) RE− +RRETh
∴ S= 1+β 1 −β (^) R E −+R R ETh
= 1+β 1+β (^) R E R +R ETh
= 1+ R β^ RE^ +RTh Th +^ 1+β^ RE
= 1 + β
1+R R ThE 1+β+R R ThE
If R RThE <<1 then above equation reduces to
S=(1 + β) (^) 1+^1 β =
Stability factor „S‟ for voltage divides or self-bias is less as compared to other biasing circuits as mentioned.
Stability factor S′: -
S′ is given by S′= (^) ∂∂VIBEC ⎪ICO ,β=constant
From eq(3) VTh = IB + RTh + VBE + (IB + IC)RE
=>VBE = VTh − (RE +RTh ) IB- REIC
We know that IC = βIB + (1+ β) ICO
∴IB=IC^ −(1+ β^ β)ICO
∴VBE= VTh −(RE +RTh ) IC^ −(1+ β β)ICO −REIC
= VTh − RE^ +R βTh IC + RE^ +RTh^ β(1+ β)ICO− REIC
= VTh − 1+^ β^ RE β^ + RTh^ IC+ RE^ +RTh^ β(1+ β)ICO------------------> (5)
Differentiating the above eq w.r.t VBE keeping ICO, β constant
From above equations, it is evident that all the values of S, S′ and S′′ are kept as low as possible by its self-biasing circuit.
Bias Compensation Techniques: -
The parameters that vary often due to changes in temperature and other circuit conditions are ICO, VBE and β which in turn vary the operating point of the transistor circuit and to provide stability, we need biasing circuits.
Stabilization techniques refer to the use of resistive biasing circuits which permit IB to vary so as to keep IC relatively constant.
On the other hand, compensation techniques refer to the use of temperature sensitive devices such as diodes, transistors, thermistors, sensistors etc to compensate for the variation in currents. For excellent bias and thermal stabilization, both stabilization as well as compensation technique are utilized.
They are
1.) Diode compensation for instability due to VBE change. 2.) Diode compensation for instability due to ICO change. 3.) Thermistor compensation. 4.) Sensistor compensation.
(1.) Diode compensation for instability due to VBE change: -
The circuit below shows self bias stabilization technique with a diode compensation for VBE.
The diode D used in the circuit must be of same material and type as the transistor. Hence the voltage VD across the diode has the same temperature coefficient (-2.5mV/℃) as VBE of the transistor. The diode D is forward biased by the source VDD and resistor RD.
Writing KVL to the base circuit, we get
VTh − IB RTh −VBE−IERE+VD = 0
VTh − VBE + VD = IB RTh + RE(IC+IB) --------------------> (1)
But IC = βIB + (1+β)ICO-----------------------> (2) From (1)
VTh −VBE+ VD = REIC + (RTh +RE) IB
Substituting the value of IB from equation (2)
VTh −VBE+VD = REIC+ (RTh +RE) IC^ −(1+ ββ)ICO
=> β[VTh −VBE+VD] = β REIC+IC (RTh +RE) −(1+β)ICO(RTh +RE)
+VCC RL RTh = (^) RR^1 R^2 1 +^ R 2 IB^ +VBE _
VD
VTh
D (^) RD VDD
RE
C
The diode D is reverse biased by VBE. So the current through D is the reverse saturation current IO.
Now base current IB = I−IO
But IC = βIB + (1+β)ICO
=>IC = β(I−IO)+(1+β)ICO
If β>>1, IC≅ βI−βIO+βICO IC≅ βI + β[ICO−IO]
From above equation IC is dependent only upon I. Since IO and ICO are almost constants and hence cancelled. Thus variations ICO is compensated by diode current IO.
(3.) Thermistor compensation: - Instead of using diodes (or) transistors, this method uses temperature sensitive resistive elements like Thermistor. Thermistor has negative temperature coefficient i.e. its resistance decreases exponentially with increasing temperature as shown in figure.
RT
Temp
∆RT ∆T
Slope of the curve =∂ ∂RTT is the temperature coefficient for thermistor and it is
negative. The following circuit shows, compensation circuit using thermistor.
In the figure, R 2 is replaced by thermistor RT in self-bias circuit. With increase in temperature, RT decreases. So voltage drop across it also decreases. This voltage drop is nothing but the voltage at the base with respect to ground. Hence, VBE decreases which reduces IB. So IC will also reduce since IC= βIB + (1+β) ICO Whenever temp increases ICO also increases, but due to Thermistor IB decreases. So IC is kept constant always. Another circuit for the same compensation technique using Thermistor is shown below.
vcc
R 1 RC IC
R^ IE E
RT
vBE _
vcc
R 1 RC^ RT
R 2 RE