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431/531 Class Notes 8
5.8 More on Transistor Circuits
5.8.1 Intrinsic Emitter Resistance
One consequence of the Eb ers-Moll equation, which we will discuss later, is that the transistor emitter has an e ective resistance which is given by
re = 25mV=IC
This is illustrated in Fig. 26. Essentially one can treat this as any other resistance. So in most of our examples so far in which an emitter resistor RE is present, one can simply replace RE by the series sum RE + re. Numerically, typical values reveal that re is safely ignored. For example, IC = 1 mA gives re = 25 , whereas RE might b e typically 1 k. The exception is an emitter follower output, where the output voltage is divided by re and RE. In some cases an external emitter resistor RE is omitted, in which case RE! re in our previous expressions.
b b e
e
c
re
Figure 26: Intrinsic emitter resistance.
5.8.2 Input and Output Imp edance of the Common-Emitter Amplifer
For convenience, the basic common-emitter ampli er is repro duced b elow. The calculation of the input imp edance do es not di er from that we used for the emitter follower in Section 5.3. That is, the input imp edance is Zin = RE ( + 1). The output imp edance is quite di erent from that of the emitter follower, however. Consider our de nition of output imp edance in terms of the Thevenin equivalent circuit:
Zout =
vout i(RL! 0)
The numerator is just the usual vout we calculated in Eqn. 26. Hence, vout = vin (RC =RE ). The short current is just iC , and since iC = ( =( + 1))iE iE = vin =RE , then we have our result Zin = ( + 1)RE ; Zout RC (30)
Note that these results apply equally well to the di erential ampli er con guration, which is, as we said b efore, essentially two coupled common-emitter ampli ers.
RC
RE
Vcc
Vout Vin
Figure 27: Basic common-emitter ampli er.
5.8.3 DC Connections and Signals
We already discussed in class the fact that for a con guration like that of the input network of Fig. 22, that the input time-varying signal vin is not a ected by the DC o sets of the resistor connections. In other words, R 1 and R 2 app ear, for a time-varying signal, to b e b oth connected to ground. Hence, when designing the cuto frequency for the input high-pass lter, the e ective resistance is just the usual parallel resistance of R 1 , R 2 , and the transistor input imp edance RE ( + 1).
5.9 Eb ers-Moll Equation and Transistor Realism
With the exception of saturation e ects and a mention of the intrinsic emitter resistance re , we have so far considered transistors in a reather idealized manner. To understand many of the most imp ortant asp ects of transistor circuits, this approach is reasonable. For example, we have treated the current gain of a non-saturated transistor to b e indep endent of currents, temp erature, etc. In reality, this is not the case. One of the ner p oints of circuit design is to take care to eliminate a strong dep endence of the circuit b ehavior on such complications. We start with the Eb ers-Moll equation, which gives a foundation for understanding one class of complications.
5.9.1 Eb ers-Moll Equation
Our simple relationship for collector current for an op erating transistor, IC = IB is an idealization. We can see from the plots of App endix K (cf pg. 1076-7) that indeed do es dep end on various parameters. A more precise description is via the Eb ers-Moll equation:
IC = IS
h
eVBE^ =VT^ 1
i
IS eVBE^ =VT^ (31)
where VT k T =e = (25: 3 mV)(T = 298 K), IS = IS (T ) is the saturation current, and VBE VB VE , as usual. Since typically VBE 600mV VT , then the exp onential term is much larger than 1, and IS IC. Since IB is also a function of VBE , then we see that = IC =IB can b e thought of as a go o d approximation for a rather complicated situation, and in fact is itself a function of IC (or VBE , as well as of temp erature.
RP R L
I P
IL
Vcc
Figure 28: Current mirror.
Early E ect. VBE dep ends on VCE :
VBE VCE
1 10 ^4
Mil ler e ect. This a ects high-frequency resp onse. The reverse-biased \dio de" b e- tween base and collector pro duces a capacitive coupling. Just as emitter resistance is e ectively multiplied by + 1 for input signals, so to o this CCB , which is ususally a few pF, app ears to input signals as a capacitance (1 + G)CCB to ground, where G is the voltage gain of the transistor con guration. Hence, when combined with input source resistance, this is e ectively a low-pass RC lter, and the ampli er resp onse for frequencies ab ove the RC cuto will b e greatly reduced. The usual solution for miti- gating the Miller e ect is to reduce the source imp edance. This can b e e ectively done by coupling to a second transistor with small source resistance at base. The casco de con guration, discussed in the text, uses this. Another example is the single-input DC di erential ampli er, for which there is no collector resistor at the input transistor (this eliminates VC even though the source resistance may b e non-negligible), and the output transistor has grounded base (therefore with very small source resistance),
Variation in gain. The may b e quite di erent from transistor to transistor, even of the same mo del. Therefore circuit designs should not rely on a sp eci c gain, other than to assume that 1.
To illustrate this last p oint, consider our earlier one transistor current source. We deter- mined that the load current can b e written
IL =
VB VBE
RE + re
where the intrinsic emitter resistance re has b een included. Therefore, the variation in IL induced by variation in is
IL IL
IL
dIL d
Hence, variations in are attenuated by the factor + 1. So this represents a go o d design. The variation in the output of this current source resulting from the Early e ect can b e evaluated similarly:
IL IL
IL
dIL dVBE
VBE =
VBE
VB VBE
1 10 ^4
VB VBE
VCE
which can b e evaluated using the compliance range for VCE. Temp erature dep endence can now b e estimated, as well. Using our current source, again, to exemplify this p oint, we see that temp erature dep endence can show up b oth in VBE and
. The former e ect can b e evaluated using the chain rule and the result from the previous paragraph: dIL dT
dIL dVBE
dVBE dT
2 : 1 mV= C RE
Therefore, we see that temp erature dep endence is / 1 =RE. As b efore, RE is in general replaced by the sum RE + re. In the case where the external resistor is omitted, then the typically small re values can induce a large temp erature dep endence (cf problem 7 at the end of Chapter 2 of the text). Similarly, using previous results, we can estimate the e ect of allowing = (T ): dIL dT
dIL d
d dT
IL
1 d dT
where the term in parentheses, the fractional gain temp erature dep endence, is often a known parameter (cf problem 2d at the end of Chapter 2 of the text).
