Instrucciones y registro de funciones especiales Pic18f2550, Guías, Proyectos, Investigaciones de Microcontroladores

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PIC18F2455/2550/4455/4550 TABLE 26-2: PIC18FXXXX INSTRUCTION SET (CONTINUED) i 16-Bit Instruction Word Mnemonie, Description Cycles Status Notes Operands MSb usb | Affected LITERAL OPERATIONS ADDIW k ¡Add literal and WREG 1 0000 1111 kkkk kkkk [C,DC,Z, OV,N ANDLW k AND literal with WREG 1 0000 1011 kkkk kkkk |Z,N ¡ORLW k Inclusive OR literal with WREG [4 0000 1001 kkkk kkkk [Z,N LESA fk Move literal (12-bit) 2nd word [2 1110 1110 00ff kkkk [None to FSR(f) 1st word 1111 0000 klk kid MOVLB_ k Move literal to BSR<3:0> 1 0000 0001 0000 kkkk [None MOVIW k Move literal to WREG 1 0000 1110 kkkk kkkk [None MULLW k Multiply literal with WREG 1 0000 1101 kkkk kkkk [None RETLW k Return with literal in WREG 2 0000 1100 kkkk kkkk [None SUBLW k Subtract WREG from literal 1 0000 1000 kkkk kkkk [C,DC,Z,OV,N XORLW k Exclusive OR literal with WREG |1 0000 1010 kkkk kkkk |Z,N DATA MEMORY + PROGRAM MEMORY OPERATIONS TBLRD* Table Read 2 0000 0000 0000 1000 [None TBLRD*+ Table Read with post-increment 0000 0000 0000 1001 [None TBLRD*- Table Read with post-decrement 0000 0000 0000 1010 [None TBLAD+" Table Read with pre-increment 0000 0000 0000 1011 [None TBLWT* Table Write 2 0000 0000 0000 1100 [None TBLWT*+ Table Write with post-increment 0000 0000 0000 1101 [None TBLWT"- Table Write with post-decrement 0000 0000 0000 1110 [None TBLWT+* Table Write with pre-increment 0000 0000 0000 1111 [None Note 1: When a PORT register is modified as a function of itself (e.9., MOVF PORTB, 1, 0),the value used will be that value present on the pins themselves. For example, if the data latch is *1' for a pin configured as an input and is driven low by an external device, the data will be written back with a “0”. If this instruction is executed on the TMRO register (and where applicable, 'd' assigned. If the Program Counter (PC) is modified or a conditional test is true, the instruction requires two cycles. The second cycle is executed as a NOD. Some instructions are two-word instructions. The second word of these instructions will be executed as a NOP unless the first word of the instruction retrieves the information embedded in these 16 bits. This ensures that all program memory locations have a valid instruction. 1), the prescaler will be cleared if